Semiconductor device and method for fabricating the same

ABSTRACT

The semiconductor device comprises a first insulation film  26  formed over a semiconductor substrate  10 , first conductor plug  32  buried in a first contact hole  28   a  formed down to a source/drain diffused layer  22 , a capacitor  44  formed over the first insulation film  26 , a first hydrogen diffusion preventing film  48  formed over the first insulation film  26 , covering the capacitor  44 , a second insulation film  50  formed over the first hydrogen diffusion preventing film and having the surface planarized, a second hydrogen diffusion preventing film  52  formed over the first hydrogen diffusion preventing film  26  and having the surface planarized, a second hydrogen diffusion preventing film  52  formed over the second insulation film  50 , second conductor plug  62  buried in a second contact hole  56  formed down to the lower electrode  38  or the upper electrode  42  of the capacitor  44 , a third conductor plug  62  buried in a third contact hole  58  formed down to the first conductor plug  32 , and an interconnection  64  connected to the second conductor plug  62  or the third conductor plug  62.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a division of U.S. application Ser. No. 11/051,643,filed on Jan. 27, 2005 which is based upon and claims priority ofJapanese Patent Application No. 2004-189365, filed on Jun. 28, 2004, andJapanese Patent Application No. 2004-330438, filed on Nov. 15, 2004, thecontents being incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device and a method forfabricating the semiconductor device, more specifically, a semiconductordevice including a capacitor using as the dielectric film, ahigh-dielectric constant substance or a ferroelectric substance, and amethod for fabricating the semiconductor device.

Recently, as the dielectric films of capacitors, the use ofhigh-dielectric constant substances or ferroelectric substances isnoted.

However, in simply using high-dielectric constant substances andferroelectric substances as the dielectric films of capacitors, theoxygen in the dielectric films is often reduced with hydrogen in latersteps after the dielectric films have been formed, and the capacitorscannot have often good electric characteristics. The oxygen in thedielectric films is reduced with hydrogen when the water contained inthe inter-layer insulation films, etc. arrives at the capacitors, andthe capacitor cannot have good electric characteristics.

As technique of preventing the deterioration of the dielectric filmswith the hydrogen and the water, the technique of forming an aluminumoxide film, covering the capacitor, and the technique of forming analuminum oxide film on the inter-layer insulation films formed on thecapacitors are proposed. Aluminum oxide film has the function ofpreventing the diffusion of hydrogen and water. Accordingly, theproposed techniques can prohibit the hydrogen and water from arriving atthe dielectric film, whereby the deterioration of the dielectric filmwith the hydrogen and the water can be prevented. These techniques areproposed in, e.g., Patent References 1 and 2.

Following references disclose the background art of the presentinvention.

[Patent Reference 1]

Specification of Japanese Patent Application Unexamined Publication No.2002-176149

[Patent Reference 2]

Specification of Japanese Patent Application Unexamined Publication No.2003-197878

[Patent Reference 3]

Specification of Japanese Patent Application Unexamined Publication No.2003-100994

[Patent Reference 4]

Specification of Japanese Patent No. 3114710

[Patent Reference 5]

Specification of Japanese Patent Application Unexamined Publication No.2003-229542

However, in simply forming an aluminum oxide film, it is difficult tosecurely prevent the deterioration of the dielectric film with thehydrogen and the water. The deterioration of the dielectric film withthe hydrogen and the water lowers the fabrication yield.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a semiconductor deviceincluding a capacitor and having high reliability, which can befabricated with high yields, and a method for fabricating thesemiconductor device.

According to one aspect of the present invention, there is provided asemiconductor device comprising: a transistor including a gate electrodeformed over a semiconductor substrate with a gate insulation film formedtherebetween, and a source/drain diffused layer formed in thesemiconductor substrate on both sides of the gate electrode; a firstinsulation film formed over the semiconductor substrate and thetransistor; a first conductor plug buried in first contact hole formeddown to the source/drain diffused layer; a capacitor formed over thefirst insulation film and including a lower electrode, a dielectric filmformed over the lower electrode and an upper electrode formed over thedielectric film; a first hydrogen diffusion preventing film formed overthe first insulation film, covering the capacitor, for preventing thediffusion of hydrogen; a second insulation film formed over the firsthydrogen diffusion preventing film, a surface of the second insulationfilm being planarized; a second hydrogen diffusion preventing filmformed over the second insulation film, for preventing the diffusion ofhydrogen; a second conductor plug buried in a second contact hole formeddown to the lower electrode or the upper electrode; a third conductorplug buried in a third contact hole formed down to the first conductorplug; and an interconnection formed over the second hydrogen diffusionpreventing film and connected to the second conductor plug or the thirdconductor plug.

According to another aspect of the present invention, there is provideda method for fabricating a semiconductor device comprising the steps of:forming a gate electrode over a semiconductor device with a gateinsulation film therebetween; forming a source/drain diffused layer inthe semiconductor substrate on both sides of the gate electrode; forminga first insulation film over the semiconductor substrate, the gateelectrode and the source/drain diffused layer; forming first contacthole in the first insulation film down to the source/drain diffusedlayer; burying first conductor plug in the first contact hole; formingover the first insulation film a capacitor including a lower electrode,a dielectric film formed over the lower electrode and an upper electrodeformed over the dielectric film; forming a first hydrogen diffusionpreventing film for preventing the diffusion of hydrogen over the firstinsulation film and the capacitor; forming a second insulation film overthe first hydrogen diffusion preventing film; polishing a surface of thesecond insulation film to planarize the surface of the second insulationfilm; forming a second hydrogen diffusion preventing film for preventingthe diffusion of hydrogen over the second insulation film; formingsecond contact hole in the first hydrogen diffusion preventing film, thesecond insulation film and the second hydrogen diffusion preventing filmdown to the lower electrode or the upper electrode; forming thirdcontact hole in the first hydrogen diffusion preventing film, the secondinsulation film and the second hydrogen diffusion preventing film downto the first conductor plug; burying second conductor plug in the secondcontact hole and third conductor plug in the third contact hole; andforming an interconnection over the second hydrogen diffusion preventingfilm in contact with the second conductor plug or the third conductorplug.

According to further another aspect of the present invention, there isprovided a semiconductor device comprising: a capacitor formed over asemiconductor substrate and including a lower electrode, a dielectricfilm formed over the lower electrode and an upper electrode formed overthe dielectric film; an insulation film formed over the semiconductorsubstrate and the capacitor, a surface of the insulation film beingplanarized; a flat barrier film formed over the insulation film, forpreventing the diffusion of hydrogen and water, the barrier filmincluding a first film for preventing the diffusion of hydrogen andwater and a second film for mitigating a stress due to the first film.

According to further another aspect of the present invention, there isprovided a method for fabricating a semiconductor device comprising: astep of forming on a semiconductor substrate a capacitor including alower electrode, dielectric film formed on the lower electrode and anupper electrode formed on the dielectric film; a step of forming aninsulation film on the semiconductor substrate and the capacitor; thestep of polishing a surface of the insulation film to planarize thesurface of the insulation film; and a step of forming over theinsulation film a barrier film for preventing the diffusion of hydrogenand water, the step of forming a barrier film including a step offorming a first film for preventing the diffusion of hydrogen and waterand a step of forming a second film for mitigating a stress due to thefirst film.

According to further another aspect of the present invention, there isprovided a semiconductor device comprising: a capacitor formed on asemiconductor substrate and including a lower electrode, a dielectricfilm formed over the lower electrode and an upper electrode formed overthe dielectric film; an insulation film formed over the semiconductorsubstrate and the capacitor, a surface of the insulation film beingplanarized; and a flat barrier film formed over the insulation film, forpreventing the diffusion of hydrogen and water, the barrier film beingformed of a plurality of first films for preventing the diffusion ofhydrogen and water, which are laid one on another with a second film ofa dielectric substance.

According to further another aspect of the present invention, there isprovided a method for fabricating a semiconductor device comprising: astep of forming over a semiconductor substrate a capacitor including alower electrode, a dielectric film formed over the lower electrode andan upper electrode formed over the dielectric film; a step of forming aninsulation film over the semiconductor substrate and the capacitor; thestep of polishing a surface of the insulation film to planarize thesurface of the insulation film; and a step of forming over theinsulation film a flat barrier film for preventing the diffusion ofhydrogen and water, in the step of forming a barrier film, a pluralityof first films for preventing the diffusion of hydrogen and water arelaid one on another with a second film of a dielectric substance formedtherebetween.

According to the present invention, the second hydrogen diffusionpreventing film is formed on the planarized second insulation film, andthe second hydrogen diffusion preventing film is accordingly flat. Theflat hydrogen diffusion preventing film has good coverage and canbarrier the hydrogen, etc. without failure. Thus the present inventioncan prevent the arrival of the hydrogen, etc. at the dielectric film ofthe capacitors without failure, and the reduction of the metal oxideforming the dielectric film of the capacitors with the hydrogen can beprevented. Furthermore, according to the present invention, with thefirst conductor plugs connected to the source/drain diffused layerburied in the first insulation film, the third conductor plugs to beconnected to the first conductor plugs are buried in the secondinsulation film, whereby even in forming the second hydrogen diffusionpreventing film on the second insulation film and below theinterconnection, the interconnection and the source/drain diffused layercan be electrically connected with each other without damaging thesource/drain diffused layer. Thus, according to the present invention,the semiconductor device of high reliability including capacitors can beprovided with high yields.

According to the present invention, the barrier film is formed of thefirst film for preventing the diffusion of the hydrogen and the water,and the second film for mitigating the stress due to the first film laidone on another, whereby the stress due to the barrier film can be madesmall, and the application of large stresses to the capacitor can beprevented. According to the present invention, the decrease of theswitching charge quantity Q_(SW) of the capacitor is surely preventedwhile the arrival of the hydrogen and the water at the capacitor can beprevented. Thus, according to the present invention, the semiconductordevice including capacitors having good electric characteristics can beprovided with high yields.

According to the present invention, the barrier film is formed of aplurality of the first films for preventing the diffusion of thehydrogen and the water which are laid one on another with the secondfilm of a dielectric substance formed therebetween, whereby thediffusion of the hydrogen and the water can be surely prevented.Furthermore, according to the present invention, the first films, whichare relatively thin, are laid one on another with the second film formedtherebetween, whereby the stress due to the barrier film can be maderelatively small with the total film thickness of the first films madethick. Thus, according to the present invention, the arrival of thehydrogen and the water at the capacitors can be surely prevented whilethe decrease of the switching charge quantity Q_(SW) of the capacitorscan be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view of the semiconductor device according to afirst embodiment of the present invention.

FIGS. 2A and 2B are graphs of the results of evaluating the hydrogendiffusion preventing film by thermal desorption spectroscopy.

FIG. 3 is a graph of changes of the switching charge quantity Q_(SW) ofthe capacitor.

FIGS. 4A and 4B are graphs of dispersion of the contact resistance ofthe lower electrode.

FIGS. 5A and 5B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 1).

FIGS. 6A and 6B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 2).

FIGS. 7A and 7B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 3).

FIGS. 8A and 8B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 4).

FIGS. 9A and 9B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 5).

FIGS. 10A and 10B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 6).

FIGS. 11A and 11B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 7).

FIGS. 12A and 12B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 8).

FIGS. 13A and 13B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 9).

FIGS. 14A and 14B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 10).

FIG. 15 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part11).

FIG. 16 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part12).

FIG. 17 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part13).

FIG. 18 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part14).

FIG. 19 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part15).

FIG. 20 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part16).

FIG. 21 is a sectional view of the semiconductor device according to thefirst embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part17).

FIG. 22 is a graph of the film stress of hydrogen diffusion preventingfilms.

FIG. 23 is a sectional view of the semiconductor device according toModification 1 of the first embodiment of the present invention.

FIG. 24 is a sectional view of the semiconductor device according toModification 2 of the first embodiment of the present invention.

FIG. 25 is a sectional view of the semiconductor device according toModification 3 of the first embodiment of the present invention.

FIG. 26 is a sectional view of the semiconductor device according to asecond embodiment of the present invention.

FIGS. 27A and 27B are sectional views of the semiconductor deviceaccording to the second embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 1).

FIG. 28 is a sectional view of the semiconductor device according to thesecond embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part2).

FIG. 29 is a sectional view of the semiconductor device according toModification 1 of the second embodiment of the present invention.

FIG. 30 is a sectional view of the semiconductor device according toModification 2 of the second embodiment of the present invention.

FIG. 31 is a sectional view of the semiconductor device according toModification 3 of the second embodiment of the present invention.

FIG. 32 is a sectional view of the semiconductor device according toModification 4 of the second embodiment of the present invention.

FIG. 33 is a sectional view of the semiconductor device according toModification 5 of the second embodiment of the present invention.

FIG. 34 is a sectional view of the semiconductor device according toModification 6 of the second embodiment of the present invention.

FIG. 35 is a sectional view of the semiconductor device according to athird embodiment of the present invention.

FIGS. 36A and 36B are sectional views of the semiconductor deviceaccording to the third embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which illustratethe method (Part 1).

FIG. 37 is a sectional view of the semiconductor device according to thethird embodiment of the present invention in the step of the method forfabricating the semiconductor device, which illustrates the method (Part2).

FIG. 38 is a sectional view of the semiconductor device according toModification 1 of the third embodiment of the present invention.

FIG. 39 is a sectional view of the semiconductor device according toModification 2 of the third embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION A First Embodiment

The semiconductor device according to a first embodiment of the presentinvention and the method for fabricating the semiconductor device willbe explained with reference to FIGS. 1 to 22.

(The Semiconductor Device)

First, the semiconductor device according to the present embodiment willbe explained with reference to FIGS. 1 to 4. FIG. 1 is a sectional viewof the semiconductor device according to the present embodiment. In FIG.1, the memory cell region 2 is illustrated on the left side of thedrawing, and on the right side of the drawing, the peripheral circuitregion 4 is illustrated.

As illustrated in FIG. 1, device isolation regions 12 defining deviceregions are formed on a semiconductor substrate 10 of, e.g., silicon.Wells 14 a, 14 b are formed in the semiconductor substrate 10 with thedevice isolation regions 12 formed on.

Gate electrodes (gate lines) 18 are formed on the semiconductorsubstrate 10 with the wells 14 a, 14 b formed in with a gate insulationfilm 16 formed therebetween. A sidewall insulation film 20 is formed onthe side walls of the gate electrodes 18.

On both sides of each gate electrode 18 with the sidewall insulationfilm 20 formed on, a source/drain diffused layer 22 is formed. Thus,transistors 24 each including the gate electrode 18 and the source/draindiffused layer 22 are formed.

An inter-layer insulation film 26 is formed on the semiconductorsubstrate 10 with the transistors 24 formed on. The surface of theinter-layer insulation film 26 is planarized.

Contact holes 28 a are formed in the inter-layer insulation film 26 downto the source/drain diffused layer 22. A contact hole 28 b is formed inthe inter-layer insulation film 26 down to the gate line (gateelectrode) 18.

A Ti film of, e.g., a 20-60 nm-thickness is formed in the contact holes28 a, 28 b. A TiN film of, e.g., a 30-50 nm-thickness is formed in thecontact holes with the Ti film formed in. The Ti film and the TiN filmform a barrier metal film 30.

Conductor plugs 32 of tungsten (W) are buried in the contact holes 28 a,28 b with the barrier metal film 30 formed in.

On the inter-layer insulation film 26 with the conductor plugs 32 buriedin, an SiON film 34 of, e.g., a 100 nm-thickness is formed. The SiONfilm 34 is for preventing the surfaces of the conductor plugs 32 whichhave been buried in from being oxidized.

As an oxidation preventing film 34, SiON, for example, SiON film isformed. However, the oxidation preventing film 34 is not essentiallySiON film. For example, Silicon oxide film may be used as the oxidationpreventing film 34.

A silicon oxide film 36 of, e.g., a 130 nm-thickness is formed on theoxidation preventing film 34.

On the silicon oxide film 36, lower electrodes 38 of the capacitors 44are formed. The lower electrodes 38 are formed of the layer filmincluding, e.g., an aluminum oxide film 38 a of a 20-100 nm-thicknessand Pt film 38 b of a 100-300 nm-thickness laid sequentially the latteron the former. The film thickness of the Pt film 38 b is set at 175 nm.

On the lower electrodes 38, a dielectric film 40 of the capacitors 44are formed. The dielectric film 40 is formed of a ferroelectric film of,e.g., a 150 nm-thickness. As the ferroelectric film, PbZr_(1-X)TixO₃film (PZT film), for example, is used.

On the dielectric film 40, upper electrodes 42 of the capacitors 44 areformed. The upper electrodes 42 are formed of the layer film, e.g., of a10-100 nm-thickness IrO_(X) film 42 a, a 100-300 nm-thickness IrO_(Y)film 42 b and a 20-100 nm-thickness Pt film 42 c laid sequentially thelatter on the former. The film thickness of the IrO_(Y) film 42 b is setat 50 nm. The film thickness of the Pt film 42 c is set at 75 nm. Thecomposition ratio Y of oxygen of the IrO_(Y) film 42 b is set higherthan the composition ratio X of oxygen of the IrO_(X) film 42 a.

The Pt film 42 c is for lowering the contact resistance between theconductor plugs and the upper electrodes 42. The Pt film 42 c may not beformed when it is not necessary to make the contact resistance betweenthe conductor plugs and the upper electrodes 42.

Thus, the capacitors 44 including the respective lower electrode 38, thedielectric film 40 and the upper electrode 42 are formed.

A hydrogen diffusion preventing film (barrier film) 46 is formed on thedielectric film 40 and the upper electrode 42, covering the uppersurfaces and the side surfaces thereof. The hydrogen diffusionpreventing film 46 is, e.g., aluminum oxide (Al₂O₃). The film thicknessof the hydrogen diffusion preventing film 46 is set at, e.g., 20-150 nm.The hydrogen diffusion preventing film 46 has the function of preventingthe diffusion of hydrogen. The hydrogen diffusion preventing film 46 hasnot only the function of preventing the diffusion of hydrogen, but alsothe function of preventing the diffusion of water. When hydrogen andwater arrive at the dielectric film 40 of the capacitors 44, the metaloxide forming the dielectric film 40 is reduced with the hydrogen, andresultantly the electric characteristics of the capacitors 44 aredegraded. The hydrogen diffusion preventing film 46 is formed, coveringthe upper surfaces and the side surfaces of the dielectric film 40 andthe upper electrode 42, whereby the hydrogen and the water are kept fromarriving at the dielectric film 40, and the degradation of the electriccharacteristics of the capacitors 44 can be suppressed.

A hydrogen diffusion preventing film 48 is formed on the capacitors 44and the silicon oxide film 36 covered by the hydrogen diffusionpreventing film 46. The hydrogen diffusion preventing film 48 is analuminum oxide film of, e.g., a 20-50 nm-thickness.

The inter-layer insulation film 50 of a silicon oxide film of, e.g., a1000 nm-thickness is formed on the hydrogen diffusion preventing film48. The surface of the inter-layer insulation film 50 is planarized.

In the present embodiment, the inter-layer insulation film 50 is formedof silicon oxide film, but the material of the inter-layer insulationfilm 50 is not limited to silicon oxide film. For example, theinter-layer insulation film 50 may be suitably formed of a dielectricinorganic film.

On the silicon oxide film 50, a hydrogen diffusion preventing film(barrier film) 52 is formed. The hydrogen diffusion preventing film 52is formed of, aluminum oxide film of, e.g., a 50-100 nm-thickness. Thehydrogen diffusion preventing film 52 of aluminum oxide film has notonly the function of preventing the diffusion of hydrogen, but also thefunction of preventing the diffusion of water. Since the hydrogendiffusion preventing film 52 is formed on the planarized silicon oxidefilm 50, the hydrogen diffusion preventing film 52 is accordingly flat.

The hydrogen diffusion preventing film 52 is formed in the form of aflat on the inter-layer insulation film 50 for the following reason.

That is, the hydrogen diffusion preventing film formed on theinter-layer insulation film having steps in the surface does not havegood coverage, and cannot sufficiently prevent the diffusion of thehydrogen and the water. The hydrogen and the water arriving at thedielectric film reduce the metal oxide forming the dielectric film withhydrogen, resultantly deteriorating the electric characteristics of thecapacitors.

In the present embodiment, however, since the hydrogen diffusionpreventing film 52 is formed on the planarized inter-layer insulationfilm 50, the hydrogen diffusion preventing film 52 is formed in the formof the flat. The flat hydrogen diffusion preventing film 52 has verygood coverage, and can barrier the hydrogen and the water withoutfailure. Furthermore, in the present embodiment, the hydrogen diffusionpreventing film 52 is formed below a first metal interconnection layer64 which will be described later, and can prevent the hydrogen and thewater from arriving at the capacitors 44 when an inter-layer insulationfilm 70 which will be described later is formed. Thus, according to thepresent embodiment, the hydrogen and the water can be prohibited fromarriving at the dielectric film 40 of the capacitors 44, and the metaloxide forming the dielectric film 40 of the capacitors 44 is preventedfrom being reduced with the hydrogen. Thus, according to the presentembodiment, the deterioration of the electric characteristics of thecapacitors 44 can be prevented without failure.

For this reason, in the present embodiment, the flat hydrogen diffusionpreventing film 52 is formed above the capacitors 44.

The film stress of the hydrogen diffusion preventing film 52 is set at,e.g., 5×10⁸ dyn/cm² or below. For the following reason, in the presentembodiment, the film stress of the hydrogen diffusion preventing film 52is set so low.

That is, when the film stress of the hydrogen diffusion preventing film52 is relatively high, stresses are applied to the capacitors 44, andthe switching charge quantity Q_(SW) of the capacitors 44 is oftendecreased. The switching charge quantity Q_(SW) is a difference betweena charge quantity of switching by polarization and a charge quantity ofnon-switching.

On the hydrogen diffusion preventing film 52, an insulation film 54 of,e.g., a silicon oxide film is formed. The film thickness of theinsulation film 54 is set at, e.g., 200-300 nm.

In the present embodiment, the insulation film 54 is formed of a siliconoxide film but is not essentially formed of a silicon oxide film. Forexample, the insulation film 54 maybe formed of an SiON film, a siliconnitride film (Si₃N₄ film) or others.

In the present embodiment, the insulation film 54 is formed on thehydrogen diffusion preventing film 52 for the following reason.

That is, when the insulation film 54 is not formed on the hydrogendiffusion preventing film 52, the hydrogen diffusion preventing film 52is often degraded in a step after the hydrogen diffusion preventing film52 has been formed, and the hydrogen diffusion preventing film 52 oftencannot have the sufficient hydrogen diffusion preventing function. Whenthe insulation film 54 is not formed on the hydrogen diffusionpreventing film 52, even the hydrogen diffusion preventing film 52 isetched in patterning interconnections. When interconnections are formeddirectly on the hydrogen diffusion preventing film 52, the reliabilityof the interconnections is often low. For the purpose of preventing suchinconveniences, the insulation film 54 is formed on the hydrogendiffusion preventing film 52 in the present embodiment.

Contact holes 56 are formed in the insulation film 54, the hydrogendiffusion preventing film 52 and the inter-layer insulation film 50 downto the upper electrodes 42. In the insulation film 54, the hydrogendiffusion preventing film 52 and the inter-layer insulation film 50,contact holes (not illustrated) are formed down to the lower electrodes38. Contact holes 58 down to the conductor plugs 32 is formed in theinsulation film 54, the hydrogen diffusion preventing film 52 and theinter-layer insulation film 50.

In the contact holes 58, a barrier metal film 60 of, e.g., a 20-100 nmthickness TiN film is formed.

In the contact holes 56, 58 with the barrier metal film 60 formed inconductor plugs 62 of tungsten are buried in.

For the following reason, the TiN film 60 alone is formed in the contactholes 56, 58 without forming a Ti film, and the conductor plugs 62 oftungsten are buried in the contact holes 56, 58 with the TiN film 60alone formed in.

That is, when the conductor plugs are formed of tungsten, generally, thelayer film of a Ti film and a TiN film is formed in the contact holes,and the conductor plugs of tungsten are buried in the contact holes withthe layer film of the Ti film and the TiN film formed in. However, whenthe Ti film contacts the upper electrodes of the capacitors, the oxygenatoms in the IrO_(X) film forming the upper electrodes of the capacitorsreact with titanium atoms in the Ti film, and TiO_(X) is generated,which increases the contact resistance between the upper electrodes andthe conductor plugs.

The Ti film is for ensuring the adhesion of the conductor plugs to thelower layer. The Ti film is not essentially necessary when the adhesionof the conductor plugs to the lower layer can be ensured without the Tifilm.

In the present embodiment, the layer lower of the conductor plugs 62 arethe conductor plugs 32 of tungsten, and without the Ti film in thecontact holes 56, 58, the adhesion of the conductor plugs 62 to thelower layer can be ensured. Accordingly, in the present embodiment, theTi film is not formed in the contact holes 56, 58, but the TiN film 60alone is formed in the contact holes 56, 58, and conductor plugs 62 oftungsten are formed in the contact holes 56, 58 with the TiN film 60formed in. Thus, in the present embodiment, it does not take place thatthe oxygen atoms in the IrO_(X) film 42 a and in the IrO_(Y) film 42 bforming the upper electrodes 42 of the capacitors 44 react with the Tiatoms of the Ti film to produce TiO_(X), and the contact resistancebetween the upper electrodes 42 and the conductor plugs 62 isaccordingly increased. Thus, according to the present embodiment, thesemiconductor device can have good electric characteristics.

On the insulation film 54, an interconnection (a first metalinterconnection layer) 64 is formed on the conductor plugs 62. Theinterconnections 64 are formed of the layer film of, e.g., a 60nm-thickness Ti film, a 30 nm-thickness TiN film, a 360 nm-thicknessAlCu alloy film, a 5 nm-thickness Ti film and a 70 nm-thickness TiNfilm.

In the present embodiment, for the following reason, the interconnection64 is not connected directly to the upper electrodes 42 and the lowerelectrodes 38 of the capacitor 44 but via the conductor plugs 62.

That is, when the interconnection is connected directly to the upperelectrodes and the lower electrodes, there is a risk that the Al used asthe material of the interconnection, and the Pt used as the material ofthe upper electrodes and the lower electrodes of the capacitors reactwith each other to form a reaction product. When the Al and the Pt reactwith each other, and a reaction product of large volumes are formed,cracks are often made in the inter-layer insulation films, etc., whichis a factor for decreasing the reliability of the semiconductor device.

In the present embodiment, the interconnection 64 is connected to theupper electrodes 42 and the lower electrodes 38 of the capacitors 44 viathe conductor plugs 62, whereby the Al used as the material of theinterconnection 64 and the Pt used as the material of the upperelectrodes 42 and the lower electrodes 38 of the capacitors 44 do notreact with each other, and accordingly no reaction product is formed.Thus, according to the present embodiment, the Al and the Pt areprohibited from reacting with each other to thereby form the reactionproduct. The decrease of the reliability of the semiconductor device canbe prevented.

On the insulation film 54 with the interconnection 64 formed on, asilicon oxide film 66 is formed. On the silicon oxide film 66, a siliconoxide film 68 is further formed. The surface of the silicon oxide film68 is planarized. The silicon oxide film 66 and the silicon oxide film68 form an inter-layer insulation film 70. The total film thickness ofthe inter-layer insulation film 70 is set at, e.g., 1275 nm.

Contact holes 72 are formed in the inter-layer insulation films 66, 68down to the interconnection 64.

In the contact holes 72, a TiN film of, e.g., a 10 nm-thickness isformed. In the contact holes 72 with the Ti film formed in, a 3.5-7nm-thickness TiN film is formed. The Ti film and the TiN film form abarrier metal film 74.

In the contact holes 72 with the barrier metal film 72, conductor plugs76 of tungsten are buried.

On the inter-layer insulation films 66, 68 with the conductor plugs 76buried in, an interconnection (a second metal interconnection layer) 78are formed, connected to the conductor plugs 76. The interconnection 78is formed of the layer film of, e.g., a 60 nm-thickness Ti film, a 30nm-thickness TiN film, a 360 nm-thickness AlCu alloy film, a 5nm-thickness Ti film and a 70 nm-thickness TiN film.

On the inter-layer insulation film 70 and the interconnection 78, asilicon oxide film 80 is formed. On the silicon oxide film 80, a siliconoxide film 82 is formed. The surface of the silicon oxide film 82 isplanarized. The silicon oxide film 80 and the silicon oxide film 82 forman inter-layer insulation film 84.

In the inter-layer insulation film 84, contact holes 86 are formed downto the interconnection 78.

In the contact holes 86, a TiN film of, e.g., a 10 nm-thickness isformed. In the contact holes 86 with the Ti film formed in, a 3.5-7nm-thickness TiN film is formed. The Ti film and the TiN film form abarrier metal film 88.

In the contact holes 86 with the barrier metal film formed in, conductorplugs 90 of tungsten are buried.

On the inter-layer insulation film 84 with the conductor plugs 90 buriedin, an interconnection (a third metal interconnection layer) 92 isformed, connected to the conductor plugs 90. The interconnection 92 isformed of the layer film of, e.g., a 60 nm-thickness Ti film, a 30nm-thickness TiN film, a 360 nm-thickness AlCu alloy film, a 5nm-thickness Ti film and a 70 nm-thickness TiN film.

On the inter-layer insulation film 84 and the interconnection 94, asilicon oxide film 94 of, e.g., a 200-300 nm-thickness is formed.

On the silicon oxide film 94, a silicon nitride film 96 of, e.g., a 500nm-thickness is formed.

On the silicon nitride film 96, a polyimide resin film 98 of, e.g., a2-10 μm-thickness is formed.

In the polyimide resin film 98, the silicon nitride film 96 and thesilicon oxide film 94, openings (not illustrated) are formed down toelectrode pads (not illustrated).

Thus, the semiconductor device according to the present embodiment isconstituted.

One characteristic of the semiconductor device according to the presentembodiment is that the flat hydrogen diffusion preventing film 52 isformed between the capacitors 44 and the first metal interconnectionlayer 64.

With the hydrogen diffusion preventing film formed on the inter-layerinsulation film with steps formed on the surface, the coverage of thehydrogen diffusion preventing film is not so good that the hydrogendiffusion preventing film cannot sufficiently prevent the diffusion ofthe hydrogen and the water. When the hydrogen and the water arrive atthe dielectric film of the capacitors, the metal oxide forming thedielectric film is reduced with the hydrogen, and the electriccharacteristics of the capacitors are degraded.

On the other hand, in the present embodiment, since the hydrogendiffusion preventing film 52 is formed on the planarized inter-layerinsulation film 50, the hydrogen diffusion preventing film 52 is flat.The flat hydrogen diffusion preventing film 52 has good coverage, andcan barrier the hydrogen and the water without failure. Furthermore, inthe present embodiment, the hydrogen diffusion preventing film 52 isformed below the first metal interconnection layer 64, and when theinter-layer insulation film 70 is formed, the hydrogen diffusionpreventing film 52 can prohibit the hydrogen and the water from arrivingat the capacitors 44. Thus, the present embodiment can prevent withoutfailure the hydrogen and the water from arriving at the dielectric film40 of the capacitors 44, whereby the reduction of the metal oxide filmforming the dielectric film 40 of the capacitors 44 with the hydrogencan be prevented. Thus, according to the present embodiment, thedeterioration of the electric characteristics of the capacitors 44 canbe surely prevented.

On major characteristic of the semiconductor device according to thepresent embodiment is that the conductor plugs 62 are not connecteddirectly to the source/drain diffused layer 22 but connected via theconductor plugs 32.

When the conductor plugs 62 are connected directly to the source/draindiffused layer 22, not only the inter-layer insulation films 50, 26,etc., but also the hydrogen diffusion preventing film 52 must be etchedso as to from the contact holes down to the source/drain diffused layer22. It is very difficult to form the contact holes down to thesource/drain diffused layer 22 without damaging the source/draindiffused layer 22 because the etching characteristics of the hydrogendiffusion preventing film 52 are largely different from the etchingcharacteristics of the inter-layer insulation films 52, 26, etc.

In the present embodiment, the conductor plugs 32 connected to thesource/drain diffused layer 22 are buried in the inter-layer insulationfilm 26 in advance, and the conductor plugs 62 connected to theconductor plugs 32 are buried in the inter-layer insulation film 50,etc., whereby the interconnection 64 and the source/drain diffused layer22 can be electrically connected to each other without damaging thesource/drain diffused layer 22. Thus, the semiconductor device accordingto the present embodiment can have high reliability and high fabricationyields.

One major characteristic of the semiconductor device according to thepresent embodiment is that in the contact holes 56, 58, the Ti film isnot formed but the TiN film 60 alone is formed, and the conductor plugs62 of tungsten are buried in the contact holes 56, 58 with the TiN film60 alone formed in.

When the conductor plugs are formed of tungsten, generally, the layerfilm of the Ti film and the TiN film is formed in the contact holes, andthe conductor plugs of tungsten are buried in the contact holes with thelayer film of the Ti film and the TiN film formed in. With the upperelectrodes of the capacitors in contact with the Ti film, the oxygenatoms in the IrO_(X) film used as the upper electrodes of the capacitorsreact with the titanium atoms in the Ti film to produce TiO_(X), whichmakes the contact resistance between the upper electrodes and theconductor plugs high.

However, in the present embodiment, intentionally, the Ti film is notformed in the contact holes 56, 58, the TiN film 60 alone is formed inthe contact holes 56, 58, and the conductor plugs 62 of tungsten areburied in the contact holes 56, 58 with the TiN film 60 formed in. Thus,according to the present embodiment, the oxygen atoms in the IrO_(X)film 42 a and the IrO_(Y) film 42 b forming the upper electrodes 42 ofthe capacitors 44 are prevented from reacting with the Ti atoms in theTi film to thereby produce TiO_(X). Thus, the present embodiment canprevent the increase of the contact resistance between the upperelectrodes 42 and the conductor plugs 62, and the semiconductor deviceaccording to the present embodiment can have good electriccharacteristics.

The Ti film, which is for ensuring the adhesion of the conductor plugs62 to the below layer, may not be essentially formed when the adhesionof the conductor plugs 62 to the lower layer can be ensured without theTi film. In the present embodiment, in which the lower layer of theconductor plugs 62 are the conductor plugs 32 of tungsten, without theTi film in the contact holes 56, 58, the adhesion of the conductor plugs62 to the lower layer can be ensured. Thus, in the present embodiment,without the Ti film in the contact holes 56, 58, no special problemtakes place.

One major characteristic of the semiconductor device according to thepresent embodiment is that the interconnection 64 is not connecteddirectly to the upper electrodes 42 and the lower electrodes 38 of thecapacitors 44 but electrically connected to the upper electrodes 42 orthe lower electrodes 38 of the capacitors 44 via the conductor plugs 62.

When the interconnection is connected directly to the upper electrodesand the lower electrodes of the capacitors, there is a risk that the Alused as the material of the interconnection and the Pt used as thematerial of the upper electrodes and the lower electrodes of thecapacitors may react with each other to thereby produce reactionproducts. When the Al and the Pt react with each other to thereby formreaction products of large volutes, often cracks are made in theinter-layer insulation film, etc., which is a factor for the decrease ofthe reliability of the semiconductor device.

In the present embodiment, in which the interconnection 64 is connectedto the upper electrodes 42 or the lower electrode 38 of the capacitors44 via the conductor plugs 62, the Al used as the material of theinterconnection 64 and the Pt used as the material of the upperelectrodes 42 and the lower electrodes 38 of the capacitors 44 neverreact with each other to thereby form reaction products. Thus, accordingto the present embodiment, the Al and the Pt are prohibited fromreacting with each other to resultantly form reaction products, causingcracks in the inter-layer insulation film 50, etc., and the decrease ofthe reliability of the semiconductor device can be prevented.

One major characteristic of the semiconductor device according to thepresent embodiment is that the oxidation preventing film 34 forpreventing the oxidation of the surface of the conductor plugs 32 isformed on the inter-layer insulation film 26 with the conductor plugs 32buried in.

According to the present embodiment, because of the oxidation preventingfilm 34 formed on the inter-layer insulation film 26, the oxidation ofthe surfaces of the conductor plugs 32 can be prevented when the siliconoxide film 36, etc. are formed, whereby the contact resistance betweenthe conductor plugs 62 and the conductor plugs 32 can be depressed low.

One major characteristic of the semiconductor device according to thepresent embodiment is that the insulation film 54 is formed on thehydrogen diffusion preventing film 52, and on the insulation film 54,the interconnection 64 is formed.

In the present embodiment, the insulation film 54 is formed on thehydrogen diffusion preventing film 52, whereby the deterioration of thehydrogen diffusion preventing film 52 can be prevented, and the hydrogendiffusion preventing film 52 can have sufficient hydrogen diffusionpreventing function. In the present embodiment, the insulation film 54is formed on the hydrogen diffusion preventing film 52, and inpatterning the interconnection 64, the hydrogen diffusion preventingfilm 52 is prevented from being etched. In the present embodiment, theinterconnection 64 is formed on the hydrogen diffusion preventing film52 via the insulation film 54, whereby the reliability of theinterconnection 64 can be improved.

Patent Reference 1 discloses the technique of forming an aluminum oxidefilm on an inter-layer insulation film with capacitor formed on. InPatent Reference 1, since the surface of the inter-layer insulation filmis not planarized, the aluminum oxide film is not accordingly flat. Thecoverage of the aluminum oxide film in Patent Reference 1 is not sogood. Accordingly, in Patent Reference 1, in forming an SiN film byplasma CVD after the aluminum oxide film has been formed, the hydrogenarrives at a dielectric film of the capacitors, and the dielectric filmof the capacitors is reduced with the hydrogen. Thus, it is difficult tofabricating a semiconductor device of high reliability with high yieldsby the technique disclosed in Patent Reference 1.

Patent Reference 2 discloses the technique of forming an organic film,covering capacitors and forming an aluminum oxide film on the organicfilm. In Patent Reference 2, the organic film covering the capacitorscontains a large quantity of water, and furthermore, the processing forremoving the water from the organic film has not been made. Accordingly,the dielectric film of the capacitors is degraded with the hydrogen andthe water. Furthermore, in Patent Reference 2, the interconnection of Alis connected directly to the upper electrodes or the lower electrodes ofthe capacitors, and the Al used as the material of the interconnectionand the Pt used as the material of the upper electricity or the lowerelectrodes of the capacitors, and the Pt used as the material of theupper electrodes or the lower electrodes of the capacitors, and the Ptused as the material of the upper electrodes or the lower electrodes ofthe capacitors are reacted with each other to form reaction products. Asdescribed above, the technique disclosed in Patent Reference 2 isevidently different from the invention of the present application.

(Evaluation Result)

Next, the result of evaluating the semiconductor device according to thepresent embodiment will be explained.

The result of the comparison in the evaluation between the semiconductordevice with the hydrogen diffusion preventing film formed on the lowerlayer having a flat surface and the semiconductor device with thehydrogen diffusion preventing film formed on the lower layer havingconcavities and convexities in the surface is shown in FIGS. 2A and 2B.FIGS. 2A and 2B are graphs of the results of evaluating the hydrogendiffusion preventing film by thermal desorption spectroscopy (TDS). InFIGS. 2A and 2B, the substrate temperature is taken on the horizontalaxis, and on the vertical axis the quantity of the gas desorbed from thesamples is taken.

FIG. 2A shows the evaluation of the hydrogen diffusion preventing filmformed on the lower layer having a flat surface. The samples wereprepared by forming silicon oxide film much containing hydrogen (H₂) orwater (H₂O) on silicon substrates by plasma TEOS CVD and then formingaluminum oxide film on the entire surfaces without making thermalprocessing. In FIG. 2A, the ◯ marks indicate the sample without thealuminum oxide film formed on; the Δ marks indicate the sample with thealuminum oxide film formed in a 10 nm-thickness; the □ marks indicatethe sample with the aluminum oxide film formed in a 30 nm-thickness; andthe ⋄ marks indicate the sample with the aluminum oxide film formed in a50 nm-thickness.

FIG. 2B shows the evaluation of the hydrogen diffusion preventing filmformed on the lower layer having concavities and convexities in thesurface. The samples were prepared by forming silicon oxide film muchcontaining hydrogen or water on silicon substrates by plasma TEOS CVD,patterning the silicon oxide film into the configuration approximate tothe capacitors and then forming aluminum oxide film on the entiresurfaces without making thermal processing. In FIG. 2B, the ◯ marksindicate the sample without the aluminum oxide film formed; the Δ marksindicate the sample with the aluminum oxide film formed in a 20nm-thickness; the □ marks indicate the sample with the aluminum oxidefilm formed in a 50 nm-thickness; and the ⋄ marks indicate the samplewith the aluminum oxide film formed in a 100 nm-thickness.

As seen in FIG. 2B, in the samples with the hydrogen diffusionpreventing film formed on the lower layer having concavities andconvexities in the surface, the quantities of the desorbed gas do notsubstantially differ between the samples with the hydrogen diffusionpreventing film formed and the sample without the hydrogen diffusionpreventing film formed. Based on this, when the hydrogen diffusionpreventing film is formed on the lower layer having concavities andconvexities in the surface, the hydrogen diffusion preventing filmcannot substantially prevent the diffusion of the hydrogen and thewater.

In contrast to this, as seen in FIG. 2A, in the samples with thehydrogen diffusion preventing film formed on the lower layer having aflat surface, the quantities of the desorbed gas in the samples with thehydrogen diffusion preventing film formed on the lower layer having theflat surface are much smaller than the quantities of the desorbed gas ofthe sample without the hydrogen diffusion preventing film formed. Basedon this, in the present embodiment, i.e., the samples with the hydrogendiffusion preventing film formed on the lower layer having the flatsurface, the hydrogen diffusion preventing film can more surely preventthe diffusion of the hydrogen and the water.

Furthermore, as seen in FIG. 2A, the quantities of the desorbed gas donot substantially differ between the samples with the hydrogen diffusionpreventing film formed and the samples without the hydrogen diffusionpreventing film formed. Based on this, in the present embodiment, i.e.,with the hydrogen diffusion preventing film formed on the lower layerhaving the flat surface, the diffusion of the hydrogen and the water canbe surely prevented even when the hydrogen diffusion preventing film isrelatively thin.

Then, the result of evaluating the deterioration of the capacitors withhydrogen ions will be explained with reference to FIG. 3. FIG. 3 is agraph of the change of the switching charge Q_(SW) of the capacitors.

In FIG. 3, the ⋄ marks and the ♦ marks indicate the present embodiment,i.e., the sample with the flat hydrogen diffusion preventing film formedover the capacitors; and the ◯ marks and the  marks indicate the samplewithout the flat hydrogen diffusion preventing film formed over thecapacitors. The resistance to hydrogen ions was evaluated by exposingthe samples in the plasma atmosphere generated by using NH₃ gas andmeasuring changes of the switching charge quantity Q_(SW) of thecapacitors.

In FIG. 3, the period of time in which the samples were exposed to theplasma atmosphere containing hydrogen ions is taken on the horizontalaxis, and the switching charge quantity Q_(SW) of the capacitors istaken on the vertical axis. The ◯ marks and the ⋄ marks indicate thesamples with a 3 V voltage applied to the capacitors. The  marks andthe ♦ marks indicate the samples with a 1.5 V voltage applied to thecapacitors.

As indicated by the ◯ marks and the  marks, without the flat hydrogendiffusion preventing film formed over the capacitors, the switchingcharge quantity Q_(SW) abruptly decreases when the capacitor is exposedto the plasma atmosphere containing hydrogen ions for 10 minutes ormore.

In contrast to this, as indicated by the ⋄ marks and the ♦ marks, in thepresent embodiment, i.e., with the flat hydrogen diffusion preventingfilm formed over the capacitors, the switching charge quantity Q_(SW)does not substantially decrease even when the capacitor is exposed tothe plasma atmosphere containing hydrogen ions for long periods of time.

Based on them, according to the present embodiment, it can be seen thatthe flat hydrogen diffusion preventing film is formed over thecapacitors, whereby the deterioration of the capacitors by hydrogen ionscan be surely prevented.

Next, the result of evaluating the contact resistance of the lowerelectrodes of the capacitors will be explained with reference to FIGS.4A and 4B. FIGS. 4A and 4B are graphs of dispersion of the contactresistance of the lower electrodes

FIG. 4A shows the result of the present embodiment, i.e., with theinterconnection layer electrically connected to the lower electrodes viathe conductor plugs of tungsten. FIG. 4B shows the results of the casewith the interconnection layer of aluminum directly connected to thelower electrodes. In FIGS. 4A and 4B, on the horizontal axis, thecontact resistance between the interconnection layer and the lowerelectrodes is taken, and the cumulative probability is taken on thevertical axis. The □ marks indicate the contact resistances before thethermal processing, and the  marks indicate the contact resistancesafter the thermal processing. The thermal processing was made in an N₂atmosphere at 420° C. for 30 minutes.

As seen in FIG. 4B, with the interconnection layer of aluminum directlyconnected to the lower electrodes, the dispersion of the contactresistance is large. Furthermore, the dispersion of the contactresistance becomes much larger before and after the thermal processing.

In contrast to this, as seen in FIG. 4A, in the present embodiment,i.e., with the interconnection layer electrically connected to the lowerelectrodes via the conductor plugs of tungsten, the dispersion of thecontact resistance is very small. Furthermore, the dispersion of thecontact resistance does not substantially change before and after thethermal processing.

Based on them, it can be seen that according to the present embodiment,the interconnection layer is connected to the lower electrodes or theupper electrodes of the capacitors via the conductor plugs, whereby thecontact reliability can be sufficiently ensured.

Next, the result of evaluating the reliability of the contact to thesource/drain diffused layer will be explained.

When the contact holes were formed in the inter-layer insulation film 26down to the source/drain diffused layer 22 without burying in advancethe conductor plugs 32 buried in the inter-layer insulation film 26, andthe conductor plugs 62 were formed in the contact holes, the contactresistance between the conductor plugs 62 and the source/drain diffusedlayer 22 largely dispersed, and in this case, often the state that theconductor plugs 62 and the source/drain diffused layer 22 were notelectrically contacted with each other, i.e., the open state took place.

In contrast to this, in the present embodiment, where the conductorplugs 32 are in advance buried in the inter-layer insulation film 26, inthe inter-layer insulation film 26 the contact holes 58 are formed downto the conductor plugs 32, and the conductor plugs 62 are formed in thecontact holes 58, the dispersion of the electric resistance between theconductor plugs 62 and the source/drain diffused layer 22 was verylittle.

Based on them, according to the present embodiment, the conductor plugs32 connected to the source/drain diffused layer 22 are formed inadvance, whereby the reliability of the contact to the source/draindiffused layer 22 can be ensured even when the contact holes 58 areformed through the aluminum oxide film 52.

Next, the result of evaluating the position where the hydrogen diffusionpreventing film is formed will be explained.

When the planarized hydrogen diffusion preventing film was formed on theinter-layer insulation film 84 without forming the flat hydrogendiffusion preventing film 52 between the capacitors 44 and the firstmetal interconnection layer 64 and without the thermal processing forremoving the water in the inter-layer insulation films 70, 84, theswitching charge quantity Q_(SW) per 1 cell of the capacitors was assmall as about 100 fC/cell. The switching charge quantity Q_(SW) willbecome so small for the following reason. This is firstly because theflat hydrogen diffusion preventing film 52, which is not formed betweenthe capacitors 44 and the first metal interconnection layer 64, cannotprevent the arrival of the hydrogen and the water at the dielectric film40 of the capacitors 44. This is secondly because the hydrogen diffusionpreventing film, which was formed on the inter-layer insulation film 84without the thermal processing for removing the water in the inter-layerinsulation films 70, 80, large quantities of the hydrogen and the waterconfined by the hydrogen diffusion preventing film will arrives at thedielectric film 40 of the capacitors 44.

In contrast to this, in the present embodiment, in which the flathydrogen diffusion preventing film 52 is formed below the first metalinterconnection layer 64, the switching charge quantity Q_(SW) per 1cell of the capacitors was about 450 fC/cell, which was relativelylarge.

Based on them, it can been seen that according to the presentembodiment, the flat hydrogen diffusion preventing film 52 is formedbetween the capacitors 44 and the first metal interconnection layer 52,whereby the arrival of the hydrogen and the water at the dielectric film40 of the capacitor 44 can be prevented without failure. According tothe present embodiment, the thermal processing for removing the hydrogenand the water in the inter-layer insulation films 70, 84 is suitablymade, where the hydrogen and the water can be surely removed from theinter-layer insulation films 70, 84. Thus, according to the presentembodiment, the arrival fo the hydrogen and the water at the dielectricfilm 40 of the capacitors 44 can be prevented without failure, and thesemiconductor device can have high reliability and high fabricationyields.

(The Method for Fabricating the Semiconductor Device)

Next, the method for fabricating the semiconductor device according tothe present embodiment will be explained with reference to FIGS. 5A to22. FIGS. 5A to 21 are sectional view of the semiconductor deviceaccording to the present embodiment in the steps of the method forfabricating the semiconductor device, which illustrate the method.

First, as illustrated in FIG. 5A the device isolation regions 12 fordefining the device regions are formed on the semiconductor substrate 10of, e.g., silicon by LOCOS (LOCal Oxidation of Silicon).

Next, a dopant impurity is implanted by ion implantation to form thewells 14 a, 14 b.

Then, the gate insulation film 16 of a 9 nm-thickness is formed in thedevice regions by, e.g., thermal oxidation.

Then, a 120 nm-thickness polysilicon film 18 is formed by, e.g., CVD.The polysilicon film 18 is to be the gate electrodes, etc.

Next, the polysilicon film 18 is patterned by photolithography. Thus, asillustrated in FIG. 5B, the gate electrodes (gate lines) 18 of thepolysilicon film are formed.

Next, with the gate electrodes 18 as the mask, a dopant impurity isimplanted into the semiconductor substrate 10 on both sides of the gateelectrodes 18. Thus, the extension regions (not illustrated) forming theshallow regions of the extension sources/drains are formed.

Then, a 150 nm-thickness silicon oxide film 20 is formed on the entiresurface by, e.g., CVD.

Next, the silicon oxide film 20 is anisotropically etched. Thus, thesidewall insulation film 20 of the silicon oxide film is formed on theside walls of the gate electrodes 18.

Next, by using as the mask the gate electrodes 18 with the sidewallinsulation film 20 formed on, a dopant impurity is implanted into thesemiconductor substrate 10 on both sides of the gate electrodes 18.Thus, an impurity diffused layer (not illustrated) forming the deepregions of the extension sources/drains is formed. The extension regionsand the deep impurity diffused layer form the source/drain diffusedlayer 22.

Thus, as illustrated in FIG. 6A, transistors 24 including the gateelectrodes 18 and the source/drain diffused layer 22 are formed.

Next, an SiON film (silicon nitride oxide film) of, e.g., a 200nm-thickness and a silicon oxide film of, e.g., a 1000 nm-thickness aresequentially formed the latter on the former on the entire surface. TheSiON film and the silicon oxide film form the inter-layer insulationfilm 26.

Next, the surface of the inter-layer insulation film 26 is planarizedby, e.g., CMP (see FIG. 6B).

Then, as illustrated in FIG. 7A, the contact holes 28 a and the contactholes 28 b are formed in the inter-layer insulation film 26 respectivelydown to the source/drain diffused layer 22 and down to the gateelectrodes (gate lines) 18 by photolithography.

Next, a 20-60 nm-thickness Ti film is formed on the entire surface by,e.g., sputtering.

Then, a 30-50 nm-thickness TiN film is formed on the entire surface by,e.g., sputtering or CVD. The Ti film and the TiN film form the barriermetal film 30.

Next, a 500 nm-thickness tungsten film 32 is formed on the entiresurface by, e.g., CVD.

Then, the tungsten film 32 and the barrier metal film 30 are polishedby, e.g., CMP until the surface of the inter-layer insulation film 26 isexposed. Thus, the conductor plugs 32 of tungsten are buried in thecontact holes 28 a, 28 b (see FIG. 7B).

Then, as illustrated in FIG. 8A, a 100 nm-thickness oxidation preventingfilm 34 is formed on the entire surface by, e.g., plasma CVD. As theoxidation preventing film 34, an SiON film or a silicon nitride film,for example, is formed.

Then, a 130 nm-thickness silicon oxide film 36 is formed on the entiresurface by, e.g., plasma TEOS CVD.

Then, thermal processing is made in a nitrogen (N₂) atmosphere. Thethermal processing temperature is, e.g., 650° C., and the thermalprocessing period of time is, e.g., 30 minutes.

Next, as illustrated in FIG. 8B, a 20-100 nm-thickness aluminum oxidefilm 38 a is formed on the entire surface by, e.g., sputtering or CVD.

Next, a 100-300 nm-thickness Pt film 38 b is formed on the entiresurface by, e.g., sputtering. The film thickness of the Pt film 38 b is,e.g., 175 nm. The layer film 38 is thus formed of the aluminum oxidefilm 38 a and the Pt film 38 b. The layer film 38 is to be the lowerelectrodes of the capacitors 44.

Then, the dielectric film 40 is formed on the entire surface by, e.g.,sputtering. As the dielectric film 40, a ferroelectric film, forexample, is formed. More specifically, a 150 nm-thickness PZT film, forexample, is formed.

The ferroelectric film forming the dielectric film 40 is formed here bysputtering but is not essentially formed by sputtering. For example, theferroelectric film may be formed by sol-gel method, MOD (Metal OrganicDeposition), MOCVD or others.

Then, thermal processing is made in an oxygen atmosphere by, e.g., RTA(Rapid Thermal Annealing). The thermal processing temperature is, e.g.,650-800° C., and the thermal processing period of time is, e.g., 30-120seconds. The thermal processing temperature is 750° C., and the thermalprocessing period of time is 60 seconds here.

Then, a 10-100 nm-thickness IrO_(X) film 42 a is formed by, e.g.,sputtering or MOCVD. The film thickness of the IrO_(X) film 42 a is 50nm.

Then, a 100-300 nm-thickness IrO_(Y) film 42 b is formed by, e.g.,sputtering or MOCVD. At this time, the IrO_(Y) film 42 b is so formedthat the composition ratio Y of oxygen of the IrO_(Y) film 42 b ishigher than the composition ratio X of oxygen of the IrO_(X) film 42 a.

Then, a 20-100 nm-thickness Pt film 42 c is formed by, e.g., sputteringor MOCVD. The film thickness of the Pt film 42 c is 75 nm here. Thedeposition temperature of the Pt film 42 c is, e.g., 450° C. Thus, thelayer film 42 of the IrO_(X) film 42 a, the IrO_(Y) film 42 b and the Ptfilm 42 c is formed. The layer film 42 is to be the upper electrodes ofthe capacitors 44.

The Pt film 42 c is for preventing the reduction of the surface of theupper electrodes 42 and decreasing the contact resistance between theconductor plugs 62 and the upper electrodes 42. When it is not necessaryto much decrease the contact resistance between the conductor plugs 62and the upper electrodes 42, the Pt film 42 c is not necessary.

Next, a photoresist film 10 is formed on the entire surface by spincoating.

Then, the photoresist film 100 is patterned by photolithography into theplane shape of the upper electrodes 42.

Then, with the photoresist film 100 as the mask, the layer film 42 isetched. The etching gas is Ar gas and Cl₂ gas. Thus, the upperelectrodes 42 of the layer film are formed (see FIG. 9A). Then, thephotoresist film 100 is released.

Next, thermal processing is made in an oxygen atmosphere at, e.g., 650°C. or above for 1-3 minutes. This thermal processing is for preventingabnormalities in the surfaces of the upper electrodes 42.

Next, thermal processing is made in an oxygen atmosphere at 650° C. for60 minutes, for example. This thermal processing is for improving thefilm quality of the dielectric film 40.

Then, a photoresist film 102 is formed on the entire surface by spincoating.

Next, by photolithography the photoresist film 102 is patterned into theplane shape of the dielectric film 40 of the capacitors 44.

Next, with the photoresist film 102 as the mask, the dielectric film 40is etched (see FIG. 9B). Then, the photoresist film 102 is released.

Next, thermal processing is made in an oxygen atmosphere at, e.g., 350°C. for 60 minutes.

Next, as illustrated in FIG. 10A, the hydrogen diffusion preventing film46 is formed by, e.g., sputtering or CVD. The hydrogen diffusionpreventing film 46 is a 20-250 nm-thickness aluminum oxide film. Whenthe hydrogen diffusion preventing film 46 is formed, it is preferable toform the hydrogen diffusion preventing film 46 under conditions whichmake the film stress of the hydrogen diffusion preventing film 46 is5×10⁸ dyn/cm² or below. The hydrogen diffusion preventing film 46 isformed under conditions which make the film stress of the hydrogendiffusion preventing film 46 so small for the purpose of, as describedabove, preventing the decrease of the switching charge quantity Q_(SW)of the capacitors 44.

FIG. 22 is a graph of the film stress of the hydrogen diffusionpreventing film. In Control 1, the film forming temperature was the roomtemperature, and the flow rate of the Ar gas was 12 sccm. In Control 2,the film forming temperature was the room temperature, and the flow rateof the Ar gas was 20 sccm. In Control 3, the film forming temperaturewas the room temperature, and the flow rate of the Ar gas was 30 sccm.In Control 4, the film forming temperature was 350° C., and the flowrate of the Ar gas was 30 sccm. In Control 5, the film formingtemperature was 350° C., and the flow rate of the Ar gas was 50 sccm. InExample 1, the film forming temperature was 350° C., and the flow rateof the Ar gas was 70 sccm.

As seen in FIG. 22, there is a tendency that when the film formingtemperature for forming the hydrogen diffusion preventing film is setrelatively high, and the flow rate of the Ar gas is set relatively high,the film stress of the hydrogen diffusion preventing film becomesrelatively small. For example, with the film forming temperature set at350° C. or above, and the flow rate of the Ar gas is set at 70 sccm, thestress generated in the hydrogen diffusion preventing film can be 5×10⁸dyn/cm² or below. The film forming temperature is, e.g., 400° C., the Arflow rate is, e.g., 100 sccm, and the film forming period of time is,e.g., 40-50 seconds here.

The hydrogen diffusion preventing film 46 having good step coverage canbe formed by using MOCVD, but when the hydrogen diffusion preventingfilm 46 is formed by MOCVD, the dielectric film 40 is damaged by thehydrogen. Accordingly, it is not preferable to use MOCVD to form thehydrogen diffusion film 46.

Next, a photoresist film 104 is formed on the entire surface by spincoating.

Then, by photolithography, the photoresist film 104 is patterned intothe plane shape of the lower electrodes 38 of the capacitors 44.

Then, with the photoresist film 104 as the mask, the hydrogen diffusionpreventing film 46 and the layer film 38 are etched (see FIG. 10B). Thelower electrodes 38 of the layer film are thus formed. The hydrogendiffusion preventing film 46 is left, covering the upper electrodes 42and the dielectric film 40. Then, the photoresist film 104 is released.

Next, thermal processing is made in an oxygen atmosphere at, e.g., 350°C. for 30-60 minutes.

Then, as illustrated I FIG. 11A, the hydrogen diffusion preventing film48 is formed on the entire surface by, e.g., sputtering or CVD. Thehydrogen diffusion preventing film 48 is a 20-50 nm-thickness aluminumoxide film. When the hydrogen diffusion preventing film 48 is formed, itis preferable that the hydrogen diffusion preventing film 48 is formedunder conditions which make the stress generated in the hydrogendiffusion preventing film 48 is 5×10⁸ dyn/cm² or below. The hydrogendiffusion preventing film 48 is formed under conditions which make thefilm stress of the hydrogen diffusion preventing film 48 so small forthe purpose of, as described above, preventing the decrease of theswitching charge quantity Q_(SW) of the capacitors 44.

Thus, the hydrogen diffusion preventing film 48 is thus formed, furthercovering the capacitors 44 covered by the hydrogen diffusion preventingfilm 46.

Then, as illustrated in FIG. 11B, the inter-layer insulation film 50 ofa silicon oxide film of the, e.g., a 1500 nm-thickness is formed on theentire surface by plasma TEOS CVD. When a silicon oxide film is formedas the inter-layer insulation film 50, a mixed gas of TEOS gas, oxygengas and helium gas is used as the raw material gas.

A silicon oxide film is formed here as the inter-layer insulation film50. However, the inter-layer insulation film 50 is not essentiallysilicon oxide film, and a dielectric inorganic film, for example, may beused as the inter-layer insulation film 50.

Then, as illustrated in FIG. 12A, the surface of the inter-layerinsulation film 50 is planarized by, e.g., CMP.

Then, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing is for removing waterin the inter-layer insulation film 50 while modifying the film qualityof the inter-layer insulation film 50 to make it difficult for water tointrude into the inter-layer insulation film 50. The substratetemperature for the thermal processing is, e.g., 350° C. The flow rateof the N₂O gas is, e.g., 1000 sccm. The flow rate of the N₂ gas is,e.g., 285 sccm. The gap between the opposed electrodes is, e.g., 30mils. The radio-frequency electric power to be applied is, e.g., 525 W.The air pressure in the chamber is, e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas, etc. here. However, the inter-layer insulation film 50 may beexposed to a plasma atmosphere generated by using N₂O gas, etc. afterthe thermal processing. In the thermal processing, water in theinter-layer insulation film 50 is removed. When the inter-layerinsulation film 50 is exposed to a plasma atmosphere generated by usingN₂O gas, etc., the film quality of the inter-layer insulation film 50 ischanged to make it difficult for the water to intrude into theinter-layer insulation film 50.

Then, as illustrated in FIG. 12B, the hydrogen diffusion preventing film52 is formed by, e.g., sputtering or CVD. The hydrogen diffusionpreventing film 52 is a 50-100 nm-thickness aluminum oxide film. Whenthe hydrogen diffusion preventing film 52 is formed, it is preferable toform the hydrogen diffusion film 52 under conditions which make the filmstress of the hydrogen diffusion preventing film 52 is 5×10⁸ dyn/cm² orbelow. The hydrogen diffusion preventing film 52 is formed underconditions which make the film stress becomes so relatively small forthe purpose of, as described above, preventing the decrease of theswitching charge quantity Q_(SW) of the capacitors 44. Since thehydrogen diffusion preventing film 52 is formed on the planarizedinter-layer insulation film 50, the hydrogen diffusion preventing film52 is flat.

Then, the insulation film 54 is formed by plasma TEOS CVD. Theinsulation film 54 is, e.g., a 200-300 nm-thickness silicon oxide film.

The insulation film 54 is formed of silicon oxide film here. However,the insulation film 54 is not essentially formed of silicon oxide film.The insulation film 54 may be formed of, e.g., SiON film or siliconnitride film.

Next, as illustrated in FIG. 13A, the contact holes 56 and contact holes(not illustrated) are formed by photolithography in the insulation film54, the hydrogen diffusion preventing film 52 and the inter-layerinsulation film 50 respectively down to the upper electrodes 42 of thecapacitors 44 and down to the lower electrodes 38 of the capacitors 44.

Then, thermal processing is made in an oxygen atmosphere. This thermalprocessing is for supplying oxygen to the dielectric film 40 of thecapacitors 44 to recover the electric characteristics of the capacitors44. The substrate temperature for the thermal processing is, e.g.,500-600° C. The thermal processing period of time is, e.g., 60 minutes.

The thermal processing is made in an oxygen atmosphere here but may bemade in an ozone atmosphere. In the thermal processing in an ozoneatmosphere, oxygen can be supplied to the dielectric film 40 of thecapacitors 44, and the electric characteristics of the capacitors 44 canbe recovered.

Then, as illustrated in FIG. 13B, by photolithography the contact holes58 are formed in the insulation film 54, the hydrogen diffusionpreventing film 52, the inter-layer insulation film 50 and the hydrogendiffusion preventing film 48, the silicon oxide film 36 and theoxidation preventing film 34 down to the conductor plugs 32.

Next, plasma cleaning using argon gas is performed. This removes thenatural oxide film, etc. present on the surfaces of the conductor plugs32. Conditions for the plasma cleaning are those which remove thethermal oxide film by, e.g., 10 nm.

Then, as illustrated in FIG. 14A, a 20-100 nm-thickness TiN film isformed on the entire surface by, e.g., sputtering. Thus, the barriermetal 60 of the TiN film is formed.

Next, a 300-600 nm-thickness tungsten film 62 is formed on the entiresurface by, e.g., CVD.

Then, the tungsten film 62 and the barrier metal film 60 are polishedby, e.g., CMP until the surface of the insulation film 54 is exposed.Thus, the conductor plugs 62 of the tungsten are buried in the contactholes 56, 58.

Then, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing removes water which hasintruded into the inter-layer insulation films 54, 50 in polishing thetungsten film 62, etc. by CMP while changing the film quality of theinter-layer insulation film 54 to thereby make the interlayer insulationfilm 54 difficult for water to intrude into. The substrate temperaturefor the thermal processing is, e.g., 350° C. The flow rate of the N₂Ogas is, e.g., 1000 sccm. The flow rate of the N₂ gas is, e.g., 285 sccm.The gap between the opposed electrodes is, e.g., 300 mils. Theradio-frequency electric power is, e.g., 525 W. The air pressure in thechamber is, e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas or others here. However, the inter-layer insulation film 54 maybe exposed to a plasma atmosphere generated by using N₂O gas or others.

Next, plasma cleaning using argon gas is performed. This removes thenatural oxide film, etc. present on the surfaces of the conductor plugs62. Conditions for the plasma cleaning are those which remove thethermal oxide film by, e.g., 10 nm.

Then, a 60 nm-thickness Ti film, a 30 nm-thickness TiN film, a 360nm-thickness AlCu alloy film, a 5 nm-thickness Ti film and a 70nm-thickness TiN film are sequentially formed by, e.g., sputtering.Thus, the layer film 64 of the Ti film, the TiN film, AlCu alloy film,the Ti film and the TiN film is formed.

Next, the layer film 64 is patterned by photolithography. Theinterconnection (the first metal interconnection layer) 64 of the layerfilm is thus formed (see FIG. 14B).

Next, as illustrated in FIG. 15, a 750 nm-thickness silicon oxide film66 is formed by, e.g., high density plasma enhanced CVD.

Next, the silicon oxide film 68 of, e.g., a 1100 nm-thickness is formedby plasma TEOS CVD. The raw material gas is, e.g., a mixed gas of TEOSgas, oxygen gas and helium gas. The silicon oxide film 66 and thesilicon oxide film 68 form the inter-layer insulation film 70.

The silicon oxide film 66 is formed by high density plasma enhanced CVD,and then the silicon oxide film 68 is formed by plasma TEOS CVD here.The processes for forming the silicon oxide film 66 and the siliconoxide film 68 are not limited to the above. For example, the siliconoxide film 66 and the silicon oxide film 68 may be both formed by plasmaTEOS CVD.

Next, as illustrated in FIG. 16, the surface of the silicon oxide film68 is planarized by, e.g., CMP.

Then, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing removes water in theinter-layer insulation film 70 while changing the film quality of theinter-layer insulation film 70 to thereby make the inter-layerinsulation film 70 difficult for water to intrude into. The substratetemperature in the thermal processing is, e.g., 350° C. The flow rate ofthe N₂O gas is, e.g., 1000 sccm. The flow rate of the N₂ gas is, e.g.,285 sccm. The gap between the opposed electrodes is, e.g., 300 mils. Theradio-frequency electric power to be applied is, e.g., 525 W. The airpressure in the chamber is, e.g., 3 Torr.

The thermal processing is made here in a plasma atmosphere generated byusing N₂O gas or others. However, after the thermal processing, theinter-layer insulation film 70 may be exposed to a plasma atmospheregenerated by using N₂O gas or others.

Next, the contact holes 74 are formed in the inter-layer insulation film70 down to the interconnection 64 by photolithography.

Next, plasma cleaning using argon gas is performed. Natural oxide film,etc. present on the surface of the interconnection 64 are removed by thecleaning. Conditions for the plasma cleaning is made under conditionswhich remove the thermal oxide film 25 by, e.g., 25 nm.

Next, a 10 nm-thickness Ti film is formed by sputtering.

Then, a 3.5-7 nm-thickness TiN film is formed by, e.g., MOCVD. The Tifilm and the TiN film form the barrier metal film 74.

Next, the tungsten film of a 300-600 nm-thickness is formed by, e.g.,CVD.

Next, the tungsten film 76 and the barrier metal film 74 are polishedby, e.g., CMP until the surface of the inter-layer insulation film 70 isexposed. The conductor plugs 76 of the tungsten are thus buried in thecontact holes 72 (see FIG. 17).

Then, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing removes water which hasintruded into the inter-layer insulation film 70 in polishing thetungsten film 76, etc. by CMP while changing the film quality of theinter-layer insulation film 70 to thereby make the inter-layerinsulation film 70 difficult for water to intrude into. The substratetemperature in the thermal processing is, e.g., 350° C. The flow rate ofthe N₂O gas is, e.g., 1000 sccm. The flow rate of the N₂ gas is, e.g.,285 sccm. The gap between the opposed electrodes is, e.g., 300 mils. Theradio-frequency electric power to be applied is, e.g., 525 W. The airpressure in the chamber is, e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas or others. However, after the thermal processing has been made,the inter-layer insulation film 70 may be exposed to a plasma atmospheregenerated by using N₂O gas or others.

Next, a 60 nm-thickness Ti film, a 30 nm-thickness TiN film, a 360nm-thickness AlCu alloy film, a 5 nm-thickness Ti film and a 70nm-thickness TiN film are sequentially formed by, e.g., sputtering.Thus, the layer film 78 is formed of the Ti film, the TiN film, the AlCualloy film, the Ti film and the TiN film.

Next, the layer film 78 is patterned by photolithography. Thus, theinterconnection (the second metal interconnection) 78 of the layer filmis formed (see FIG. 18).

Next, the silicon oxide film 80 of a 750 nm-thickness is formed by,e.g., high density plasma enhanced CVD.

Next, the silicon oxide film 82 of, a 1100 nm-thickness is formed byplasma TEOS CVD. The silicon oxide film 80 and the silicon oxide film 82form the inter-layer insulation film 84.

The silicon oxide film 80 is formed by high density plasma enhanced CVD,and then the silicon oxide film 82 is formed by plasma TEOS CVD here.However, the processes for forming the silicon oxide film 80 and thesilicon oxide film 82 are not essentially limited to them. For example,the silicon oxide film 80 and the silicon oxide film 82 may be bothformed by plasma TEOS CVD.

Next, the surface of the silicon oxide film 82 is planarized by, e.g.,CMP (see FIG. 19).

Then, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing is for removing waterin the inter-layer insulation film 84 while changing the film quality ofthe inter-layer insulation film 84 to thereby make the inter-layerinsulation film 84 difficult for water to introduce into. The substratetemperature in the thermal processing is, e.g., 350° C. The flow rate ofN₂O gas is, e.g., 1000 sccm. The flow rate of N₂ gas is, e.g., 285 sccm.The gap between the opposed electrodes is, e.g., 300 mils. Theradio-frequency electric power to be applied is, e.g., 525 W. The airpressure in the chamber is, e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas or others. However, after the thermal processing has been made,the inter-layer insulation film 84 may be exposed to a plasma atmospheregenerated by using N₂O gas or others.

Next, the contact holes 86 are formed in the inter-layer insulation film84 down to the interconnection 78 by photolithography.

Next, plasma cleaning with argon gas is performed. This cleaning removesnatural oxide film, etc. present on the surface of the interconnection78. Conditions for the plasma cleaning are those which remove thethermal oxide film by, e.g., 25 nm.

Next, a 10 nm-thickness Ti film is formed by, e.g., sputtering.

Next, a 3.5-7 nm-thickness TiN film is formed by, e.g., MOCVD. The Tifilm and the TiN film form the barrier metal film 88.

Next, the tungsten film 90 of, e.g., a 300-600 nm-thickness is formedby, e.g., CVD.

Next, the tungsten film 90 and the barrier metal film 88 are polishedby, e.g., CMP until the surface of the inter-layer insulation film 84 isexposed. The conductor plugs 90 of the tungsten are thus buried in thecontact holes 86.

Next, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing is for removing waterwhich has introduced into the inter-layer insulation film 84 inpolishing the tungsten film 90, etc. by CMP while changing the filmquality of the inter-layer insulation film 84 to thereby make theinter-layer insulation film 84 difficult for water to intrude into. Thesubstrate temperature in the thermal processing is, e.g., 350° C. Theflow rate of the N₂O gas is, e.g., 1000 sccm. The flow rate of the N₂gas is, e.g., 285 sccm. The gap between the opposed electrodes is, e.g.,300 mils. The radio-frequency electric power to be applied is, e.g., 525W. The air pressure in the chamber is, e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas or others. However, after the thermal processing has been made,the inter-layer insulation film 84 may be exposed to a plasma atmospheregenerated by using N₂O gas or others.

Then, a 60 nm-thickness Ti film, a 30 nm-thickness TiN film, a 360nm-thickness AlCu alloy film, a 5 nm-thickness Ti film, a 70nm-thickness TiN film are sequentially formed by, e.g., sputtering.Thus, the layer film 92 of the Ti film, the TiN film, the AlCu alloyfilm, the Ti film and the TiN film is formed.

Next, the layer film 92 is patterned by photolithography. Theinterconnection (the third metal interconnection) 92 of the layer filmis formed (see FIG. 20).

Next, the silicon oxide film 94 of a 700 nm-thickness is formed by,e.g., high density plasma enhanced CVD.

The silicon oxide film 94 is formed here by high density plasma enhancedCVD. However, the process for forming the silicon oxide film 94 is notessentially limited to the high density plasma enhanced CVD. The siliconoxide film 94 may be formed by plasma TEOS CVD.

Next, thermal processing is made in a plasma atmosphere generated byusing N₂O gas or others. This thermal processing is for removing water,etc. from the insulation film 94 while changing the film quality of theinsulation film 94 to thereby make the insulation film 94 difficult forwater to intrude into. The substrate temperature in the thermalprocessing is, e.g., 350° C. The flow rate of the N₂O gas is, e.g., 1000sccm. The flow rate of the N₂ gas is, e.g., 285 sccm. The gap betweenthe opposed electrodes is, e.g., 300 mils. The radio-frequency electricpower to be applied is, e.g., 525 W. The air pressure in the chamber is,e.g., 3 Torr.

The thermal processing is made in a plasma atmosphere generated by usingN₂O gas or others. However, after the thermal processing is made, theinsulation film 94 may be exposed to a plasma atmosphere generated byusing N₂O gas or others.

Then, the silicon nitride film 96 of a 500 nm-thickness is formed by,e.g., CVD. The silicon nitride film 96 is for shutting off water tothereby prevent the corrosion of the interconnections 64, 78, 96, etc.with water.

Then, openings (not illustrated) are formed in the silicon nitride film96 and the silicon oxide film 94 down to the electrode pads (notillustrated) by photolithography.

Next, the polyimide film 98 of, e.g., a 2-10 μm-thickness is formed byspin coating.

Then, openings (not illustrated) are formed in the polyimide film 79down to the electrode pads (not illustrated) by photolithography.

Thus, the semiconductor device according to the present embodiment isfabricated.

(Modification 1)

Then, the semiconductor device according to one modification(Modification 1) of the present embodiment will be explained withreference to FIG. 23. FIG. 23 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that the semiconductor device includes ahydrogen diffusion preventing film 107 formed of a layer film.

As illustrated in FIG. 23, the hydrogen diffusion preventing film 52 isformed on the inter-layer insulation film 50. The hydrogen diffusionpreventing film 52 is formed of, e.g., a 50 nm-thickness aluminum oxidefilm.

Another hydrogen diffusion preventing film 106 is formed on the hydrogendiffusion preventing film 52. The hydrogen diffusion preventing film 106is formed of a silicon nitride film of, e.g., a 50-100 nm-thickness.Thus, the hydrogen diffusion preventing film 107 is formed of layer filmof the hydrogen diffusion preventing film 52 and the hydrogen diffusionpreventing film 106.

The insulation film 54 is formed on the hydrogen diffusion preventingfilm 106.

As described above, the hydrogen diffusion preventing film 107 may beformed of the layer film. According to the present modification, thehydrogen diffusion preventing film is formed of the layer film 107,whereby the arrival of the hydrogen and the water at the dielectric film40 of the capacitors 44 can be prevented without failure. Thus,According to the present modification, the semiconductor deviceincluding the capacitors 44 can have higher yields.

Said another hydrogen diffusion preventing film 106 is laid on thehydrogen diffusion preventing film 52 here, but the hydrogen diffusionpreventing film 106 may be formed below the hydrogen diffusionpreventing film 52. Even with the hydrogen diffusion preventing film 107formed of the layer film structure of the hydrogen diffusion preventingfilm 106 formed below the hydrogen diffusion preventing film 52, thearrival of the hydrogen and the water at the dielectric film 40 of thecapacitors 44 can be prevented without failure, as in the semiconductordevice illustrated in FIG. 23.

(Modification 2)

Next, the semiconductor device according to a modification (Modification2) of the present embodiment will be explained with reference to FIG.24. FIG. 24 is a sectional view of the semiconductor device according tothe present modification.

The semiconductor device according to the present modification ischaracterized mainly in that a hydrogen diffusion preventing film 108 isfurther formed between the inter-layer insulation film 70 and the secondmetal interconnection layer 78, and a hydrogen diffusion preventing film112 is further formed between the inter-layer insulation film 84 and thethird metal interconnection layer 92.

As illustrated in FIG. 24, the hydrogen diffusion preventing film 108 isformed on the planarized inter-layer insulation film 70. The hydrogendiffusion preventing film 108 is an aluminum oxide film of, e.g., a 50nm-thickness. Since the hydrogen diffusion preventing film 108 is formedon the inter-layer insulation film 70 having the surface planarized, thehydrogen diffusion preventing film 108 is flat.

An insulation film 110 is formed on the hydrogen diffusion preventingfilm 108. The insulation film 110 is a silicon oxide film of, e.g., a100 nm-thickness.

The interconnection 78 is formed on the insulation film 110.

The hydrogen diffusion preventing film 112 is formed on the planarizedinter-layer insulation film 84. The hydrogen diffusion preventing film112 is an aluminum oxide film of, e.g., a 50 nm-thickness. The hydrogendiffusion preventing film 112 is formed on the inter-layer insulationfilm 84 having the surface planarized, and the hydrogen diffusionpreventing film 112 is planarized.

An insulation film 114 is formed on the hydrogen diffusion preventingfilm 112. The insulation film 114 is a silicon oxide film of, e.g., a100 nm-thickness.

The interconnection 92 is formed on the insulation film 114.

Thus, the semiconductor device according to the present modification isconstituted.

According to the present modification, the hydrogen diffusion preventingfilm 52 is formed between the inter-layer insulation film 50 and thefirst metal interconnection layer 64, and the hydrogen diffusionpreventing films 108, 112 are formed respectively between theinter-layer insulation film 70 and the second metal interconnectionlayer 78 and between the inter-layer insulation film 84 and the thirdmetal interconnection layer 92, whereby the arrival of the hydrogen andthe water at the dielectric film 40 of the capacitors 44 can beprevented without failure. Thus, according to the present modification,the semiconductor device including the capacitors 44 can have highyields.

(Modification 3)

Next, the semiconductor device according to one modification(Modification 3) of the present embodiment will be explained withreference to FIG. 25. FIG. 25 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that even the surface of an inter-layerinsulation film 118 covering the interconnection layer 92, which is theuppermost interconnection layer, is planarized, and a hydrogen diffusionpreventing film 120 is formed further on the planarized inter-layerinsulation film 118.

As illustrated in FIG. 25, a silicon oxide film 116 is formed on thesilicon oxide film 94 formed, covering the uppermost interconnection 92.The silicon oxide film 94 and the silicon oxide film 116 form theinter-layer insulation film 118. The surface of the inter-layerinsulation film 118 is planarized.

A hydrogen diffusion preventing film 120 is formed on the planarizedinter-layer insulation film 118. The hydrogen diffusion preventing film120 is an aluminum oxide film of, e.g., a 50 nm-thickness. Since thehydrogen diffusion preventing film 120 is formed on the planarizedinter-layer insulation film 118, the hydrogen diffusion preventing film120 is flat.

An insulation film 122 is formed on the hydrogen diffusion preventingfilm 120. The insulation film 122 is a silicon oxide film of, e.g., a100 nm-thickness.

The silicon nitride film 96 is formed on the insulation film 122.

The polyimide film 98 is formed on the silicon nitride film 96.

Thus, the semiconductor device according to the present modification isconstituted.

According to the present modification, the flat hydrogen diffusionpreventing film 120 is formed also on the inter-layer insulation film118 covering the upper most interconnection 92, whereby the arrival ofthe hydrogen and the water at the dielectric film 40 of the capacitors44 can be prevented without failure. Thus, according to the presentmodification, semiconductor device including the capacitors 44 can beprovided with further high yields.

A Second Embodiment

As described above, the flat barrier film (the hydrogen diffusionpreventing film) 52 for preventing the diffusion of the hydrogen and thewater is formed over the capacitors, whereby the arrival of the hydrogenand the water at the capacitors 44 can be prevented without failure.

However, when such barrier film 52 is simply formed, often the switchingcharge quantity Q_(SW) of the capacitors 44 is decreased. Such decreaseof the switching charge quantity Q_(SW) of the capacitors 44 will be dueto large stresses generated by forming the barrier film 52, which areexerted to the capacitors 44, blocking the polarization of theferroelectric film 40 of the capacitors 44.

The inventors of the present application made earnest studies and havegot the idea that a hydrogen/water diffusion preventing film having thefunction of preventing the diffusion of the hydrogen and the water and astress mitigating layer for mitigating the stress of the hydrogen/waterdiffusion preventing film are laid one on another to form a barrierfilm. The hydrogen/water diffusion preventing film for preventing thediffusion of the hydrogen and the water, and the stress mitigating filmfor mitigating the stress due to the hydrogen/water diffusion preventingfilm are laid one on another to thereby make the stress due to thebarrier film small, and the application of large stresses to thecapacitors can be prevented. Then, the polarization in the dielectricfilm of the capacitors is not easily blocked, and the decrease of theswitching charge quantity Q_(SW) can be prevented. According to thepresent invention, the semiconductor device can prevent the decrease ofthe switching charge Q_(SW) of the capacitor and can have highreliability.

The semiconductor device according to the second embodiment of thepresent invention and the method for fabricating the semiconductordevice will be explained with reference to FIGS. 26 to 28. FIG. 26 is asectional view of the semiconductor device according to the presentembodiment. The same members of the present embodiment as those of thesemiconductor device according to the first embodiment and the methodfor fabricating the semiconductor device illustrated in FIGS. 1 to 25are represented by the same reference numbers not to repeat or tosimplify their explanation.

(The Semiconductor Device)

First, the semiconductor device according to the present embodiment willbe explained with reference to FIG. 26.

As illustrated in FIG. 26, on the planarized inter-layer insulation film50, the hydrogen/water diffusion preventing film 52 for preventing thediffusion of the water and the hydrogen is formed. The hydrogen/waterdiffusion preventing film 52 is, e.g., a hydrogen/water diffusionpreventing film of, e.g., a metal oxide film. The metal oxide filmforming the hydrogen/water diffusion preventing film 52 is, e.g.,aluminum oxide film. The film thickness of the hydrogen/water diffusionpreventing film 52 is, e.g., about 20-30 nm. The film thickness of thehydrogen/water diffusion preventing film is set so relatively small soas to make the stress due to the hydrogen/water diffusion preventingfilm 52 small.

The hydrogen/water diffusion preventing film 52 is aluminum oxide filmhere but is not essentially aluminum oxide film. For example, thehydrogen/water diffusion preventing film 52 may be another metal oxide.For example, titanium oxide film or others may be used as thehydrogen/water diffusion preventing film.

A stress mitigating film 124 is formed on the hydrogen/water diffusionpreventing film 52. The stress mitigating film 124 is for mitigating thestresses of the hydrogen/water diffusion preventing films 52, 126. Forexample, when the thermal expansion coefficients of the hydrogen/waterdiffusion preventing films 52, 126 are larger than those of theinter-layer insulation film 50, etc., a material whose thermal expansioncoefficient is smaller than that of the inter-layer insulation film 50is used as the stress mitigating film 124. When the thermal expansioncoefficients of the hydrogen diffusion preventing films 52, 126 aresmaller than the thermal expansion coefficient of the inter-layerinsulation film 50, a material whose thermal expansion coefficient islarger than the thermal expansion coefficients of the inter-layerinsulation film 50, etc. is used as the stress mitigating film 124. Thehydrogen diffusion preventing films 52, 126 and the stress mitigatingfilm 124 are suitably combined, whereby the difference in the thermalexpansion coefficient between the inter-layer insulation film 50, etc.and the barrier film 128 can be small, and the stress due to the barrierfilm 128 can be small.

When the hydrogen/water diffusion preventing films 52, 126 are aluminumoxide film, the stress mitigating film 124 can be, e.g., silicon nitrideoxide film. The silicon nitride oxide film can function not only as thestress mitigating film but also as the water diffusion preventing filmfor preventing the diffusion of the water. The film thickness of thestress mitigating film 124 is, e.g., about 50-100 nm.

The stress mitigating film 124 is silicon nitride oxide film here but isnot essentially silicon nitride oxide film. For example, the stressmitigating film 124 may be silicon nitride film. Silicon nitride filmcan function as the water diffusion preventing film for preventing thediffusion of the water, as does silicon nitride oxide film.

A hydrogen/water diffusion preventing film 126 for preventing thediffusion of the hydrogen and the water is formed on the stressmitigating film 124. The hydrogen/water diffusion preventing film 126 ismetal oxide film, as is the hydrogen/water diffusion preventing film 52.The metal oxide film is, e.g., an aluminum oxide film, as describedabove. The film thickness of the hydrogen/water diffusion preventingfilm 126 is, e.g., about 20-30 nm. The film thickness of thehydrogen/water diffusion preventing film 126 is set so relatively smallfor the purpose of making the stress due to the hydrogen/water diffusionpreventing film 126 small. The hydrogen/water diffusion preventing film126 is formed over the hydrogen/water diffusion preventing film 52 forthe purpose of sufficiently ensuring the total film thickness of thehydrogen/water diffusion preventing films for preventing the diffusionof the hydrogen and the water.

The hydrogen/water diffusion preventing film 126 is aluminum oxide filmbut is not essentially aluminum oxide film. For example, thehydrogen/water diffusion preventing film 126 may be another metal oxide.For example, the hydrogen/water diffusion preventing film 126 may betitanium oxide film.

The hydrogen/water diffusion preventing film 52, the stress mitigatingfilm 124 and the hydrogen/water diffusion preventing film 126 form thebarrier film 128. Since the barrier film 128 is formed on theinter-layer insulation film 50 having the surface planarized, thebarrier film 128 is flat.

A silicon oxide film 54 is formed on the barrier film 128. The filmthickness of the silicon oxide film 54 is, e.g., about 50-100 nm.

Thus, the semiconductor device according to the present embodiment isconstituted.

(Evaluation Result)

The result of evaluating the semiconductor device according to thepresent embodiment will be explained.

The switching charge quantity Q_(SW) per 1 cell of the capacitor wasmeasured. The configuration of the capacitor was 2 μm×2 μm.

The switching charge quantity Q_(SW) was measured on the semiconductordevice without the flat barrier film formed over the capacitor. Theswitching charge quantity Q_(SW) per 1 cell was about 480 fC.

The switching charge quantity Q_(SW) per 1 cell measured on thesemiconductor device with the flat barrier film formed in a 50nm-thickness over the capacitors was about 430 fC. Based on this, it canbe seen that with the relatively thick barrier film formed over thecapacitors, the switching charge quantity Q_(SW) per 1 cell is smallerthan that without the barrier film formed over the capacitors.

In contrast to this, in the present embodiment, wherein the flat barrierfilm 128 is formed, over the capacitors 44, of the layer film of the 20nm-thickness hydrogen/water diffusion preventing film 52, the 50nm-thickness stress mitigating film 124, the 20 nm-thicknesshydrogen/water diffusion preventing film 126, the switching chargequantity Q_(SW) per 1 cell was about 480 fC. Based on this, it can beseen that the present embodiment can prevent sufficiently the decreaseof the switching charge quantity Q_(SW) of the capacitors 44.

The switching charge quantity Q_(SW) of test capacitors was measured.The electrode area of the test capacitors was 50 μm sq.

In the semiconductor device without the flat barrier film formed overthe capacitors, the switching charge quantity Q_(SW) of the testcapacitor was about 24 μC.

With the 50 nm-thickness flat barrier film formed above the capacitors,the switching charge quantity Q_(SW) of the test capacitor was about 8.0μC. Based on this, it can be seen that with the flat barrier film formedover the capacitors, the switching charge quantity Q_(SW) of the testcapacitor is smaller by about 66% than that of the test capacitorwithout the flat barrier film formed over the capacitors.

In contrast to this, in the present embodiment, wherein the planarizedbarrier film 128 of the 20 nm-thickness hydrogen/water diffusionpreventing film 52, the 50 nm-thickness stress mitigating film 124 andthe 20 nm-thickness hydrogen/water diffusion preventing film 126 formedover the capacitors 44, the switching charge quantity Q_(SW) of the testcapacitor was 22 μC. Based on this, according to the present embodiment,the decrease of the switching charge Q_(SW) of the test capacitor can beprevented without failure.

The semiconductor device according to the present embodiment ischaracterized mainly in that, as described above, the flat barrier metal128 of the hydrogen/water diffusion preventing film 52, the stressmitigating film 124 and the hydrogen/water diffusion preventing film 126laid one on another is formed on the planarized inter-layer insulationfilm 50.

As described above, with the flat barrier film simply formed above thecapacitors 44, large stresses due to the barrier film are exerted to thecapacitors 44, and the switching charge quantity Q_(SW) of thecapacitors 44 is often decreased.

In contrast to this, according to the present embodiment, thehydrogen/water diffusion preventing films 52, 126 and the stressmitigating film 124 are laid one on another, whereby the stresses due tothe barrier film 128 can be made small. Furthermore, the hydrogen/waterdiffusion preventing films 52, 126, which are relatively thin, are laidone on another, whereby the total thickness of the hydrogen/waterdiffusion preventing films 52, 126 can be relatively thick.

Thus, according to the present embodiment, the decrease of the switchingcharge quantity Q_(SW) of the capacitors 44 is surely prevented whilethe arrival of the hydrogen and the water at the capacitors 44 can beprevented. According to the present embodiment, it is possible toprovide the semiconductor device including capacitors having goodelectric characteristics with high fabrication yields.

Patent reference 3 discloses a semiconductor device including a waterdiffusion preventing film of a silicon nitride film, etc. formed overcapacitors, and a hydrogen diffusion preventing film of an aluminumoxide film, etc. formed on the water-diffusion preventing film. InPatent Reference 3, the water diffusion preventing film is formed,covering a metal interconnection, which makes it technically difficultto form the surface of the water diffusion preventing film being flat.Patent Reference 3 neither discloses nor suggests a technique ofplanarizing the surface of the hydrogen diffusion preventing film.Patent Reference 3 cannot planarize the hydrogen diffusion preventingfilm formed on the water diffusion preventing film and accordinglycannot planarize the hydrogen diffusion preventing film formed on thewater diffusion preventing film. Patent Reference 3 cannot prevent thediffusion of the hydrogen and the water by the hydrogen diffusionpreventing film and the water diffusion preventing film without failure.When a silicon nitride film is formed on the metal interconnection ofaluminum as in Patent Reference 3, the life of the metal interconnectionof aluminum is very short. Patent Reference 3 neither discloses norsuggests a technique of the invention of the present application thatstresses to be exerted to the capacitors are mitigated, whereby thedecrease of the switching charge quantity Q_(SW) of the capacitors canbe prevented.

(The Method for Fabricating the Semiconductor Device)

Next, the method for fabricating the semiconductor device according tothe present embodiment will be explained with reference to FIGS. 27 and28. FIGS. 27 and 28 are sectional views of the semiconductor deviceaccording to the present embodiment in the steps of the method forfabricating the semiconductor device, which explain the method.

First, the steps up to the step of planarizing the inter-layerinsulation film 50 including the inter-layer insulation film 50planarizing step are the same as the steps of the method for fabricatingthe semiconductor device, which have been explained with reference toFIGS. 5A to 12A, and their explanation will not be repeated (see FIG.27A).

Then, thermal processing is made in a nitrogen atmosphere. The nitrogenatmosphere is, e.g., N₂O plasma. The thermal processing temperature is,e.g., about 300-400° C. The thermal processing temperature is 350° C.here. The thermal processing period of time is, e.g., 2-6 minutes. Thethermal processing period of time is, e.g., 2 minutes here. This thermalprocessing is made for the purpose of removing water present in theinter-layer insulation film 50 and nitriding the surface of theinter-layer insulation film 50. The surface of the inter-layerinsulation film 50 is nitrided, whereby the intrusion of the water intothe inter-layer insulation film 50 from the outside can be prevented,which leads to the prevention of the deterioration of the electrodecharacteristics of the capacitors 42.

Then, as illustrated in FIG. 27B, the hydrogen/water diffusionpreventing film 52 is formed by, e.g., sputtering or CVD. Thehydrogen/water diffusion preventing film 52 is, e.g., a 20-30nm-thickness aluminum oxide.

Conditions for forming the hydrogen/water diffusion preventing film 52of aluminum oxide film by sputtering are as exemplified below. Thetarget is a target of aluminum oxide. The gas to be supplied into thefilm forming chamber is, e.g., Ar gas. The flow rate of the Ar gas is 20sccm. The pressure inside the film forming chamber is, e.g., 1 Pa. Theelectric power to be applied is, e.g., 2 kW. The substrate temperatureis, e.g., 20° C. The film forming period is, e.g., 40-60 seconds. Thefilm forming period of time is suitably set, whereby the film thicknessof the hydrogen/water diffusion preventing film 52 can be controlled.Since the hydrogen/water diffusion preventing film 52 is formed on theplanarized inter-layer insulation film 50, the hydrogen/water diffusionpreventing film 52 is flat.

Next, the stress mitigating film 124 is formed by, e.g., CVD. The stressmitigating film 124 is a silicon nitride oxide film of, e.g., a 50-100nm-thickness.

Conditions for forming the stress mitigating film 124 of silicon nitrideoxide film by CVD are as exemplified below. The gases to be suppliedinto the film forming chamber are SiH₄ gas and N₂O gas. The flow rate ofthe SiH₄ gas is, e.g., 38 sccm. The flow rate of the N₂O gas is, e.g.,90 sccm. The film forming period of time is, e.g., 20 second. Thepressure inside the film forming chamber is, e.g., 1.5 Torr. The gapbetween the opposed electrodes is, e.g., 350 mils. The electric power tobe applied is, e.g., 50 W. The substrate temperature is, e.g., 350° C.Since the stress mitigating film 124 is formed on the flathydrogen/water diffusion preventing film 52, the stress mitigating film124 is flat.

Then, the hydrogen/water diffusion preventing film 126 is formed by,e.g., sputtering or CVD. The hydrogen/water diffusion preventing film126 is, e.g., a 20-30 nm-thickness aluminum oxide film. Conditions forforming the hydrogen/water diffusion preventing film 126 are the sameas, e.g., those for forming the hydrogen/water diffusion preventing film52. Since the hydrogen/water diffusion preventing film 126 is formed onthe flat stress mitigating film 124, the hydrogen/water diffusionpreventing film 126 is flat.

Thus, the hydrogen/water diffusion preventing film 52, the stressmitigating film 124 and the hydrogen/water diffusion preventing film 126form the barrier film 128. Since the barrier film 128 is formed on theplanarized inter-layer insulation film 50, the barrier film 128 is flat.

Next, the insulation film 54 is formed on the barrier film 128.

The following steps of the method for fabricating the semiconductordevice according to the present embodiment are the same as those of themethod for fabricating the semiconductor device described above withreference to FIGS. 13A to 21, and their explanation will not berepeated.

Thus, the semiconductor device according to the present embodiment isfabricated (see FIG. 28).

(Modification 1)

Then, the semiconductor device according to one modification(Modification 1) of the present embodiment will be explained withreference to FIG. 29. FIG. 29 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that stress mitigating films 124, 130 are formedrespectively over and under the hydrogen/water diffusion preventing film52.

As illustrated in FIG. 29, the stress mitigating film 124 is formed onthe planarized inter-layer insulation film 50. The stress mitigatingfilm 124 is, e.g., silicon nitride oxide film. The film thickness of thestress mitigating film 124 is, e.g., about 50-100 nm. Since the stressmitigating film 124 is formed on the planarized inter-layer insulationfilm 50, the stress mitigating film 124 is flat.

The hydrogen/water diffusion preventing film is formed on the stressmitigating film 124. The hydrogen/water diffusion preventing film 52 is,e.g., an aluminum oxide film. The film thickness of the hydrogen/waterdiffusion preventing film 52 is, e.g., about 20-30 nm. Since thehydrogen/water diffusion preventing film 52 is formed on the flat stressmitigating film 124, the hydrogen/water diffusion preventing film 52 isflat. The hydrogen/water diffusion preventing film 52 is not essentiallyaluminum oxide film. For example, the hydrogen/water diffusionpreventing film 52 may be another metal oxide. For example, thehydrogen/water diffusion preventing film 52 may be titanium oxide orothers.

A stress mitigating film 130 is formed on the hydrogen/water diffusionpreventing film 52. The stress mitigating film 130 is, e.g., siliconnitride oxide film. Since the stress mitigating film 130 is formed onthe flat hydrogen/water diffusion preventing film 52, the stressmitigating film 130 is flat. The film thickness of the stress mitigatingfilm 130 is, e.g., about 50-100 nm.

Thus, the stress mitigating film 124, the hydrogen/water diffusionpreventing film 52 and the stress mitigating film 130 form a barrierfilm 128 a. Since the barrier film 128 a is formed on the planarizedinter-layer insulation film 50, the barrier film 128 a is flat.

As described above, the stress mitigating films 124, 130 may be formedrespectively over and under the hydrogen/water diffusion preventing film52. According to the present modification, the stress mitigating films124, 130 for mitigating stresses due to the hydrogen/water diffusionpreventing film 52 are formed over and under the hydrogen/waterdiffusion preventing film 52, whereby the barrier film 128 a can makethe stresses to be applied to the capacitors 44 very small. Thus,according to the present modification, the arrival of the hydrogen andthe water at the capacitors 44 can be prevented while the decrease ofthe switching charge quantity Q_(SW) of the capacitors 44 can beprevented.

(Modification 2)

Next, the semiconductor device according to one modification(Modification 2) of the present embodiment will be explained withreference to FIG. 30. FIG. 30 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that a stress mitigating film 130 a formed onthe upper side of the hydrogen/water diffusion preventing film 52 issilicon nitride film.

As illustrated in FIG. 30, the stress mitigating film 130 a of siliconnitride film is formed on the hydrogen/water diffusion preventing film52. The film thickness of the stress mitigating film 130 a is, e.g.,50-100 nm. Conditions for forming the stress mitigating film 130 a ofsilicon nitride oxide film by CVD are as exemplified below. The gases tobe supplied into the film forming chamber are SiH₄ gas, NH₃ gas, N₂ gasand H₂ gas. The flow rate of the SiH₄ gas is, e.g., 55 sccm. The flowrate of the NH₃ gas is, e.g., 500 sccm. The flow rate of the N₂ gas is,e.g., 250 sccm. The flow rate of the H₂ gas is, e.g., 250 sccm. Thepressure inside the film forming chamber is, e.g., 4.0 Torr. Thesubstrate temperature is, e.g., 400° C. The gap between the opposedelectrodes is, e.g., 600 mils. The electric power to be applied is,e.g., 100 W. The low-frequency electric power to be applied is, e.g., 55W. When the film thickness of the stress mitigating film 130 a is 100nm, the film forming period of time is, e.g., 18 seconds. Since thestress mitigating film 130 a is formed on the flat hydrogen/waterdiffusion preventing film 52, the stress mitigating film 130 a is flat.

Thus, the stress mitigating film 124, the hydrogen/water diffusionpreventing film 52 and the stress mitigating film 130 a form a barrierfilm 128 b. Since the barrier film 128 b is formed on the planarizedinter-layer insulation film 50, the barrier film 128 b is flat.

For the following reason, only the stress mitigating film 130 a aloneformed over the hydrogen/water diffusion preventing film 52 is siliconnitride film, and the stress mitigating film 124 formed under thehydrogen/water diffusion preventing film 52 is silicon nitride oxidefilm.

That is, when silicon nitride film is formed, generally the film isformed in an atmosphere containing hydrogen. When silicon nitride filmis formed directly on the inter-layer insulation film 50, the hydrogenin the film forming atmosphere passes through the inter-layer insulationfilm 50 and arrives at the capacitors 44. Then, the dielectric film 40of the capacitors 44 is reduced with the hydrogen, and the electriccharacteristics of the capacitors 44 are deteriorated. Accordingly, thestress mitigating film 124 formed under the hydrogen/water diffusionpreventing film 52 is not silicon nitride film but silicon nitride oxidefilm. When silicon nitride film is formed over the hydrogen/waterdiffusion preventing film 52, the inter-layer insulation film 50 hasbeen already covered with the hydrogen/water diffusion preventing film52, and without any problem, the hydrogen in the film forming atmospherecan be surely prevented from arriving at the inside of the inter-layerinsulation film 50.

As described above, the stress mitigating film 130 a formed over thehydrogen/water diffusion preventing film 52 may be silicon nitride film.

(Modification 3)

Next, the semiconductor device according to one modification(Modification 3) of the present embodiment will be explained withreference to FIG. 31. FIG. 31 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that the stress mitigating film 124, and thehydrogen/water diffusion preventing film 52 formed on the stressmitigating film 124 form a barrier film 128 c.

As illustrated in FIG. 31, the stress mitigating film 124 is formed onthe planarized inter-layer insulation film 50. The stress mitigatingfilm 124 is, e.g., silicon nitride oxide film. The film thickness of thestress mitigating film is, e.g., about 50-100 nm.

The hydrogen/water diffusion preventing film 52 of a metal oxide isformed on the stress mitigating film 124. The film thickness of thehydrogen/water diffusion preventing film 52 is about 20-30 nm.

Thus, the barrier film 128 c is formed of the stress mitigating film 124and the hydrogen/water diffusion preventing film 52. Since the barrierfilm 128 c is formed on the planarized inter-layer insulation film 50,the barrier film 128 c is flat.

Thus, the semiconductor device according to the present modification isconstituted.

As in the present modification, the barrier film 128 c may be formed ofthe stress mitigating film 124, and the hydrogen/water diffusionpreventing film 52 formed on the stress mitigating film 124.

(Modification 4)

Next, the semiconductor device according to one modification(Modification 4) of the present embodiment will be explained withreference to FIG. 32. FIG. 32 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that the hydrogen/water diffusion preventingfilm 52, and the stress mitigating film 124 formed on the hydrogen/waterdiffusion preventing film 52 form a barrier film 128 d.

As illustrated in FIG. 32, the hydrogen/water diffusion preventing film52 is formed on the planarized inter-layer insulation film 50. The filmthickness of the hydrogen/water diffusion preventing film 52 is, e.g.,about 20-30 nm.

The stress mitigating film 124 of, e.g., a silicon nitride oxide film isformed on the hydrogen/water diffusion preventing film 52. The filmthickness of the stress mitigating film 124 is, e.g., about 50-100 nm.

The stress mitigating film 124 is silicon nitride oxide film here but isnot essentially a silicon nitride oxide film. For example, the stressmitigating film 124 may be a silicon nitride film.

A barrier film 128 d is formed of the hydrogen/water diffusionpreventing film 52 and the stress mitigating film 124. Since the barrierfilm 128 d is formed on the planarized inter-layer insulation film 50,the barrier film 128 d is flat.

Thus, the semiconductor device according to the present modification isconstituted.

As in the present modification, the barrier film 128 d may be formed ofthe hydrogen/water diffusion preventing film 52, and the stressmitigating film 124 formed on the hydrogen/water diffusion preventingfilm 52.

(Modification 5)

Next, the semiconductor device according to one modification(Modification 5) of the present embodiment will be explained withreference to FIG. 33. FIG. 33 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that a barrier film 138 is further formedbetween the first metal interconnection layer 64 and the second metalinterconnection layer 78, and a barrier film 146 is further formedbetween the second metal interconnection layer 78 and the third metalinterconnection layer 92.

As illustrated in FIG. 33, the barrier film 138 of a hydrogen/waterdiffusion preventing film 132, the stress mitigating film 134 and thehydrogen/water diffusion preventing film 136 laid one on another formedon the planarized inter-layer insulation film 70. The hydrogen/waterdiffusion preventing films 132, 136 are, e.g., 20-30 nm-thicknessaluminum oxide films. The stress mitigating film 134 is, e.g., a 50-100nm-thickness silicon nitride oxide film. Since the barrier film 138 isformed on the inter-layer insulation film 70 having the surfaceplanarized, the barrier film 138 is flat.

The hydrogen/water diffusion preventing films 132, 136 are aluminumoxide films here but is not essentially aluminum oxide films. Thehydrogen/water diffusion preventing films 132, 136 may be other metaloxides. For example, the hydrogen/water diffusion preventing films 132,136 may be titanium oxide films or others.

The stress mitigating film 134 is, e.g., silicon nitride oxide film herebut is not essentially silicon nitride oxide film. For example, thestress mitigating film 134 may be silicon nitride film. As describedabove, the silicon nitride film can function as the water diffusionpreventing film for preventing the diffusion of the water.

An insulation film 110 is formed on the barrier film 138. The insulationfilm 110 is, e.g., a 100 nm-thickness silicon oxide film.

The second metal interconnection layer 78 is formed on the insulationfilm 110.

The barrier film 146 of the hydrogen/water diffusion preventing film130, the stress mitigating film 142 and the hydrogen/water diffusionpreventing film 144 is formed on the planarized inter-layer insulationfilm 84. The hydrogen/water diffusion preventing films 140, 144 are,e.g., 20-30 nm-thickness aluminum oxide films. The stress mitigatingfilm 142 is, e.g., a 50-100 nm-thickness silicon nitride oxide film.Since the barrier film 146 formed on the inter-layer insulation film 84having the surface planarized, the barrier film 146 is flat.

The hydrogen/water diffusion preventing films 140, 144 are, e.g.,aluminum oxide film but are not essentially aluminum oxide film. Forexample, the hydrogen/water diffusion preventing films 140, 144 may be,e.g., other metal oxides. For example, the hydrogen/water diffusionpreventing films 140, 144 may be titanium oxide or others.

The stress mitigating film 142 is silicon nitride oxide film here but isnot essentially silicon nitride oxide film. For example, the stressmitigating film 142 may be silicon nitride film. As described above,silicon nitride film can function as the water diffusion preventing filmfor preventing the diffusion of the water.

An insulation film 144 is formed on the barrier film 146. The insulationfilm 114 is, e.g., a 100 nm-thickness silicon oxide film.

The third metal interconnection layer 92 is formed on the insulationfilm 114.

Thus, the semiconductor device according to the present modification isconstituted.

According to the present modification, in addition to the barrier film128 formed between the capacitors 44 and the first metal interconnectionlayer 64, the barrier films 138, 146 are formed respectively between thefirst metal interconnection layer 64 and the second metalinterconnection layer 78 and between the second metal interconnectionlayer 78 and the third metal interconnection layer 92, whereby thearrival of the hydrogen and the water at the capacitors 44 can beprevented without failure.

(Modification 6)

Next, the semiconductor device according to one modification(Modification 6) of the present embodiment will be explained withreference to FIG. 34. FIG. 34 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly by the stacked memory cell structure.

As illustrated in FIG. 34, device isolation regions 12 for definingdevice regions are formed on the semiconductor substrate 10. Wells 14 a,14 b are formed in the semiconductor substrate 10 with the deviceisolation regions 12 formed on.

Gate electrodes 18 are formed, via a gate insulation film 16, over thesemiconductor substrate with the wells 14 a, 14 b formed in. A siliconoxide film 148 is formed on the gate electrodes 18. A sidewallinsulation film 20 is formed on the side walls of the gate electrodes 18and the silicon oxide film 148.

A source/drain diffused layer 22 is formed on both sides of the gateelectrodes 18 with the sidewall insulation film 20 formed on. Thus,transistors 24 each including the gate electrode 18 and the source/draindiffused layer 22 are formed. The gate length of the transistor 24 isset at, e.g., 0.18 μm.

An inter-layer insulation film 154 of a silicon nitride oxide film 150and a silicon oxide film 152 laid one on the other is formed on thesemiconductor substrate 10 with the transistors 24 formed on. Thesurface of the inter-layer insulation film 154 is planarized.

A hydrogen/water diffusion preventing film 156 for preventing thediffusion of the hydrogen and the water is formed on the inter-layerinsulation film 154. The hydrogen/water diffusion preventing film 156is, e.g., metal oxide film, such as aluminum oxide film, titanium oxidefilm or others.

A contact hole 28 is formed in the hydrogen/water diffusion preventingfilm 156 and the inter-layer insulation film 154 is formed down to thesource/drain diffused layer 22.

A barrier metal film (not illustrated) of a Ti film and a TiN film laidone on the other is formed in the contact hole 28.

A conductor plug 32 of tungsten is buried in the contact hole 28 withthe barrier metal film formed in.

An Ir (Iridium) film 158 electrically connected to the conductor plug 32is formed on the hydrogen/water diffusion preventing film 156.

The lower electrodes 38 of the capacitors 44 are formed on the Ir film158. The dielectric film 40 of the capacitors 44 is formed on the lowerelectrodes 38. The dielectric film 40 is, e.g., ferro-electric film,such as PZT or others. The upper electrodes 42 of the capacitors 44 areformed on the dielectric film 40. The upper electrodes 42, thedielectric film 40, the lower electrodes 38 and the Ir film 158 arepatterned at once by etching and have substantially the same planeshape.

Thus, capacitors 44 each including the lower electrode 38, thedielectric film 40 and the upper electrodes 42 are constituted. Thelower electrodes 38 of the capacitors 44 are electrically connected tothe conductor plugs 32 via the Ir film 158.

A silicon nitride oxide film 160 is formed on the hydrogen/waterdiffusion preventing film 156 in the region where the Ir film 158 is notformed.

The barrier film 48 having the function of preventing the diffusion ofthe hydrogen and the water is formed on the capacitors 44 and thesilicon nitride oxide film 160. The barrier film 48 is, e.g., metaloxide film, such as aluminum oxide film, titanium oxide film or others.

The inter-layer insulation film 50 of silicon oxide film is formed onthe hydrogen/water diffusion preventing film 48. The surface of theinter-layer insulation film 50 is planarized.

A barrier film 128 of the hydrogen/water diffusion preventing film 52and a stress mitigating film 124 and the hydrogen/water diffusionpreventing film 126 laid one on the other is formed on the planarizedinter-layer insulation film 50. Since the barrier film 128 is formed onthe inter-layer insulation film 50 having the surface planarized, thebarrier film 128 is flat.

A silicon oxide film 54 is formed on the barrier film 128.

Contact holes 56 are formed in the silicon oxide film 54, the barrierfilm 128, the silicon oxide film 50 and the hydrogen/water diffusionpreventing film 48 down to the upper electrodes 42 of the capacitors 44.A contact hole 58 is formed in the silicon oxide film 54, the barrierfilm 128, the silicon oxide film 50, the hydrogen/water diffusionpreventing film 48 and the silicon nitride oxide film 160 down to theconductor plug 32.

A barrier metal film (not illustrated) of a Ti film and a TiN film laidone on the other is formed in the contact holes 56, 58.

Conductor plugs 62 of tungsten are buried respectively in the contactholes 56, 58 with the barrier metal film formed in.

An interconnection (a first metal interconnection layer) 64 is formed onthe silicon oxide film 54, electrically connected to the conductor plugs62.

An inter-layer insulation film 70 of, e.g., a silicon oxide film isformed on the silicon oxide film 54 with the interconnection 64 formedon. The surface of the inter-connection layer 70 is planarized.

A flat barrier film 138 of a hydrogen/water diffusion preventing film132, a stress mitigating film 134 and a hydrogen/water diffusionpreventing film 136 is formed on the planarized inter-layer insulationfilm 70.

A silicon oxide film 110 is formed on the barrier film 138.

A contact hole 72 is formed in the silicon oxide film 110, the barrierfilm 138 and the silicon oxide film 70 down to the interconnection 64.

A barrier metal film (not illustrated) of a Ti film and a TiN film laidone on the other is formed in the contact hole 72.

A conductor plug 76 of tungsten is buried in the contact hole 72 withthe barrier metal film formed in.

An interconnection 78 is formed on the silicon oxide film 110,electrically connected to the conductor plug 76.

An inter-layer insulation film 84 of a silicon oxide film is formed onthe silicon oxide film 110 with the interconnection 78 formed on. Thesurface of the inter-layer insulation film 84 is planarized.

A flat barrier film 146 of a hydrogen/water diffusion preventing film140, a stress mitigating film 142 and a hydrogen/water diffusionpreventing film 144 is formed on the planarized inter-layer insulationfilm 84.

A silicon oxide film 114 is formed on the barrier film 146.

An interconnection (a third metal interconnection layer) not illustratedis formed on the silicon oxide film 114.

As in the present modification, the memory cell structure may be of thestacked type.

A Third Embodiment

The semiconductor device according to a third embodiment of the presentinvention and the method for fabricating the semiconductor device willbe explained with reference to FIGS. 35 to 37. FIG. 35 is a sectionalview of the semiconductor device according to the present embodiment.The same members of the semiconductor device according to the first orthe second embodiments and the method for fabricating the semiconductordevice illustrated in FIGS. 1 to 34 are represented by the samereference numbers not to repeat or to simplify their explanation.

The semiconductor device according to the present embodiment ischaracterized mainly in that a plurality of hydrogen/water diffusionpreventing films are laid one on another with intermediate layers formedthere between, whereby a barrier film is formed.

As illustrated in FIG. 35, a hydrogen/water diffusion preventing film 52having the function of preventing the diffusion of the hydrogen and thewater is formed on an inter-layer insulation film 50. The hydrogen/waterdiffusion preventing film 52 is, e.g., metal oxide film. Thehydrogen/water diffusion preventing film 52 of a metal oxide film is,e.g., an aluminum oxide film. The film thickness of the hydrogen/waterdiffusion preventing film 52 is, e.g., 20-30 nm. The film thickness ofthe hydrogen/water diffusion preventing film 52 is set so small so as tomake the stress due to the hydrogen/water diffusion preventing film 52.

The hydrogen/water diffusion preventing film 52 is, e.g., aluminum oxidefilm here but is not essentially aluminum oxide film. For example, thehydrogen/water diffusion preventing film 52 may be another metal oxide.For example, the hydrogen/water diffusion preventing film 52 may betitanium oxide film or others.

An intermediate layer 162 of a dielectric substance is formed on thehydrogen/water diffusion preventing film 52. The intermediate layer 162is, e.g., silicon oxide film. The thickness of the intermediate layer162 is, e.g., about 20-30 nm.

The intermediate layer 162 is e.g., silicon oxide film here but is notessentially silicon oxide film. For example, the intermediate layer 162is, e.g., silicon nitride oxide film, silicon nitride film or others.Silicon nitride oxide film and silicon nitride film can function as thestress mitigating film as described above, the intermediate layer 162formed of silicon nitride oxide film or silicon nitride film canmitigate the stress due to the hydrogen/water diffusion preventing films52, 164. Silicon nitride oxide film and silicon nitride film canfunction as the water diffusion preventing film for preventing thediffusion of water, and the intermediate layer 162 of silicon nitrideoxide film or silicon nitride film can prevent the arrival of the waterat the capacitors 44 without failure.

A hydrogen/water diffusion preventing film 164 having the function ofpreventing the diffusion of the hydrogen and the water is formed on theintermediate layer 162. The hydrogen/water diffusion preventing film 164is, e.g., aluminum oxide film, as described above. The film thickness ofthe hydrogen/water diffusion preventing film 164 is, e.g., about 20-30nm. The film thickness of the hydrogen/water diffusion preventing film164 is set so small so that the stress due to the hydrogen/waterdiffusion preventing film 164 is made small.

The hydrogen/water diffusion preventing film 164 is aluminum oxide filmhere but is not essentially aluminum oxide film. For example, thehydrogen-water diffusion preventing film 164 may be another metal oxide.For example, the hydrogen/water diffusion preventing film 164 may betitanium oxide film or others.

An intermediate layer 166 of a dielectric substance is formed on thehydrogen/water diffusion preventing film 164. The intermediate layer 166is, e.g., silicon oxide film. The thickness of the intermediate layer166 is, e.g., about 50-100 nm.

The intermediate layer 166 is silicon oxide film here but is notessentially silicon oxide film. For example, the intermediate layer 166may be silicon nitride oxide film or silicon nitride film.

A hydrogen/water diffusion preventing film 168 having the function ofpreventing the diffusion of the hydrogen and the water is formed on theintermediate layer 166. The hydrogen/water diffusion preventing film 168is, e.g., aluminum oxide film, as described above. The film thickness ofthe hydrogen/water diffusion preventing film 168 is, e.g., about 20-30nm. The film thickness of the hydrogen/water diffusion preventing film168 is set so relatively thin so that the stress due to thehydrogen/water diffusion preventing film 168 is made small.

The hydrogen/water diffusion preventing film 168 is, e.g., aluminumoxide film here but is not essentially aluminum oxide film. For example,the hydrogen/water diffusion preventing film 168 may be another metaloxide. For example, the hydrogen/water diffusion preventing film 168 maybe titanium oxide film or others.

Thus, the hydrogen/water diffusion preventing film 52, the intermediatelayer 162, the hydrogen/water diffusion preventing film 164, theintermediate layer 166 and the hydrogen/water diffusion preventing film168 form a barrier film 170. Since the barrier film 170 is formed on theinter-layer insulation film 50 having the surface planarized, thebarrier film 170 is flat.

In the present embodiment, for the following reason, a plurality ofhydrogen/water diffusion preventing film 52, 164, 168 are laid one onanother with the intermediate layers 162, 166 formed there between.

That is, often scratches are formed in the surface of the inter-layerinsulation film 50, the surface of which is planarized by CMP or others.When the hydrogen/water diffusion preventing film 52 is formed on theinter-layer insulation film 50 with scratches formed in, often cracksare formed partially in the hydrogen/water diffusion preventing film 52due to the steps formed by the scratches. With the cracks formed in thehydrogen/water diffusion preventing film 52, the hydrogen and the wateroften arrive at the capacitors 44 through the cracks in thehydrogen/water diffusion preventing film 52, resultantly causing thedeterioration of the electric characteristics of the capacitors 44. Evenwhen no cracks due to the scratches in the inter-layer insulation film50 are formed in the hydrogen/water diffusion preventing film 52, oftenpin holes are formed in the hydrogen/water diffusion preventing film 52,and the hydrogen and the water arrive at the capacitors 44 through thepin holes formed in the hydrogen/water diffusion preventing film 52.

In the present embodiment, the hydrogen/water diffusion preventing film164 is laid above the hydrogen/water diffusion preventing film 52, andthe hydrogen/water diffusion preventing film 164 is formed above thehydrogen/water diffusion preventing film 52 with the intermediate layer162 formed there between, whereby even when cracks are formed in thehydrogen/water diffusion preventing film 52, the possibility that cracksare formed even in the other hydrogen/water diffusion preventing film164 is very low. Pin holes may be formed also in the hydrogen/waterdiffusion preventing film 164, but the possibility that pin holes formedin the hydrogen/water diffusion preventing film 52 and pin holes formedin the hydrogen/water diffusion preventing film 164 are located neareach other is very low. Thus, according to the present embodiment, theprevention of the diffusion of the hydrogen and the water can be moreensured in comparison with that with one hydrogen/water diffusionpreventing film formed.

Furthermore, according to the present embodiment, above thehydrogen/water diffusion preventing film 164, the hydrogen/waterdiffusion preventing film 168 is formed, whereby the arrival of thehydrogen and the water at the capacitors 44 can be more surelyprevented.

With one hydrogen/water diffusion preventing film above the capacitors44, for the sure prevention of the diffusion of the hydrogen and thewater, the film thickness of the hydrogen/water diffusion preventingfilm must be set at 50 nm or above. The stress due to the hydrogen/waterdiffusion preventing film of such relatively large film thickness isrelatively large, and the relative large stress is exerted to thecapacitors, which causes a risk that the switching charge quantityQ_(SW) of the capacitors may be decreased.

In contrast to this, in the present embodiment, the hydrogen/waterdiffusion preventing films 52, 164, 168, which are as relatively thin asabout 20 nm are laid one on another with the intermediate layers 162,166 formed there between. The stress due to such relatively thinhydrogen/water diffusion preventing films 52, 162, 168 is very small incomparison with the stress due to the relatively thick hydrogen/waterdiffusion preventing film. The stress due to the barrier film 170 of therelatively thin hydrogen/water diffusion preventing films 52, 164, 168laid one on another with the intermediate layers 162, 166 formed therebetween is smaller than the stress due to one relatively thickhydrogen/water diffusion preventing film. Moreover, the total filmthickness of the hydrogen/water diffusion preventing films 52, 164, 168is relatively thick. Thus, according to the present embodiment, thetotal film thickness of the hydrogen/water diffusion preventing film 52,164, 168 can be made relatively thick while the stress due to thebarrier film 170 can be made small. Accordingly, in the presentembodiment, the arrival of the hydrogen and the water at the capacitors44 can be surely prevented while the decrease of the switching chargequantity Q_(SW) of the capacitors 44 can be prevented.

A silicon oxide film 54 is formed on the barrier film 170. The filmthickness of the silicon oxide film 54 is, e.g., about 50-100 nm.

Thus, the semiconductor device according to the present embodiment isconstituted.

As described above, the semiconductor device according to the presentembodiment is characterized mainly in that a plurality of hydrogen/waterdiffusion preventing films 52, 164, 168 are laid one on another with theintermediate layers 162, 166 formed there between.

According to the present invention, the hydrogen/water diffusionpreventing film 164 is formed above the hydrogen/water diffusionpreventing film 52 with the intermediate layer 162 formed there between,whereby eve when cracks are formed in the hydrogen/water diffusionpreventing film 52, the possibility that cracks may be formed even inthe hydrogen/water diffusion preventing film 164 is very low. Thepossibility that pinholes formed in the hydrogen/water diffusionpreventing film 52 and the pin holes formed in the hydrogen/waterdiffusion preventing film 164 may locate near each other is very low.Thus, according to the present embodiment, the prevention of thediffusion of the hydrogen and the water can be more ensured incomparison with that with one hydrogen/water diffusion preventing filmformed above the capacitors 44. Furthermore, according to the presentembodiment, the hydrogen/water diffusion preventing film 168 is formedabove the hydrogen/water diffusion preventing film 164, whereby theprevention of the diffusion of the hydrogen and the water can be moreensured.

According to the present embodiment, the barrier film 170 is formed ofthe relatively thin hydrogen/water diffusion preventing film 52, 164,168 are laid one on another with the intermediate layers 162, 166 formedthere between, whereby the total film thickness of the hydrogen/waterdiffusion preventing films 52, 164, 168 is made relatively thick whilethe stress due to the barrier film 170 can be made relatively small.Thus, according to the present embodiment, the arrival of the hydrogenand the water at the capacitors 44 can be prevented without failurewhile the decrease of the switching charge quantity Q_(SW) of thecapacitors 44 can be prevented.

(The Method for Fabricating the Semiconductor Device)

Next, the method for fabricating the semiconductor device according tothe present embodiment will be explained with reference to FIGS. 36 and37. FIGS. 36 and 37 are sectional views of the semiconductor device inthe steps of the method for fabricating the semiconductor device, whichillustrate the method.

First, the steps up to the step of planarizing the inter-layerinsulation film 50 including the inter layer insulation film 50planarizing step are the same as those of the method for fabricating thesemiconductor device explained with reference to FIGS. 5A to 12A, andtheir explanation will not be repeated (see FIG. 36A).

Next, thermal processing is made in a nitrogen atmosphere. The nitrogenatmosphere is, e.g., N₂O plasma. The thermal processing temperature is,e.g., 300-400° C. The thermal processing temperature is, e.g., 350° C.here. The thermal processing period of time is, e.g., 2-6 minutes. Thethermal processing period of time is 2 minutes here. This thermalprocessing is for removing water present in the inter-layer insulationfilm 50 while nitriding the surface of the inter-layer insulation film50. The surface of the inter-layer insulation film 50 is nitrided,whereby the intrusion of water into the inter-layer insulation film 50from the outside can be prevented, which leads to the prevention of thedeterioration of the electrode characteristics of the capacitors 42.

Then, as illustrated in FIG. 36B, the hydrogen/water diffusionpreventing film 52 is formed by, e.g., sputtering or CVD. Thehydrogen/water diffusion preventing film 52 is, e.g., a 20-30nm-thickness metal oxide film. The hydrogen/water diffusion preventingfilm 52 of the metal oxide film is, e.g., aluminum oxide film.

Conditions for forming the hydrogen/water diffusion preventing film 52of aluminum oxide film by sputtering are the same as, e.g., thosedescribed above. Since the hydrogen/water diffusion preventing film 52is formed on the planarized inter-layer insulation film 50, thehydrogen/water diffusion preventing film 52 is flat.

Then, the intermediate layer 162 is formed by, e.g., CVD. Theintermediate layer 162, e.g., a 20-30 nm-thickness silicon oxide film.Conditions for forming the intermediate layer 162 are, e.g., as follows.The gas to be supplied into the film forming chamber is TEOS gas and O₂gas. The flow rate of the TEOS gas is, e.g., 1.8 ml/minute. The flowrate of the O₂ gas is, e.g., 8 liters/minute. The pressure inside thefilm forming chamber is, e.g., 2.2 Torr. The film forming temperatureis, e.g., 350° C. The radio-frequency electric power to be applied is,e.g., 350 W. The low-frequency electric power to be applied is, e.g.,650 W. The film forming period of time is, e.g., 3.6 seconds when thefilm thickness of the intermediate layer 162 is 20 nm. Since theintermediate layer 162 is formed on the planarized hydrogen/waterdiffusion preventing film 52, the intermediate layer 162 is flat.

Then, the hydrogen/water diffusion preventing film 164 is formed by,e.g., sputtering or CVD. The hydrogen/water diffusion preventing film164 is, e.g., a 20-30 nm-thickness metal oxide film. The hydrogen/waterdiffusion preventing film 164 of a metal oxide film is, e.g., aluminumoxide film. Conditions for forming the hydrogen/water diffusionpreventing film 164 are the same as, e.g., those for forming thehydrogen/water diffusion preventing film 52. Since the hydrogen/waterdiffusion preventing film 164 is formed on the flat intermediate layer162, the hydrogen/water diffusion preventing film 164 is flat.

Next, the intermediate layer 166 is formed by, e.g., CVD. Theintermediate layer 166, e.g., a 20-30 nm-thickness silicon oxide film.Conditions for forming the intermediate layer 166 are the same as, e.g.,those for forming the intermediate layer 162. Since the intermediatelayer 166 is formed on the flat hydrogen/water diffusion preventing film164, the intermediate layer 166 is flat.

Next, the hydrogen/water diffusion preventing film 168 is formed by,e.g., sputtering or CVD. The hydrogen/water diffusion preventing film168 is, e.g., a 20-30 nm-thickness aluminum oxide film. Conditions forforming the hydrogen/water diffusion preventing film 168 are the sameas, e.g., those for forming the hydrogen/water diffusion preventing film52. Conditions for forming the hydrogen/water diffusion preventing film168 of aluminum oxide film by sputtering are the same as, e.g.,described above.

Thus, the barrier film 170 is formed of the hydrogen/water diffusionpreventing film 52, the intermediate layer 162, the hydrogen/waterdiffusion preventing film 164, the intermediate layer 166 and thehydrogen/water diffusion preventing film 168. Since the barrier film 170is formed on the planarized inter-layer insulation film 50, the barrierfilm 170 is formed flalty.

Next, the insulation film 54 is formed on the barrier film 170.

The following steps of the method for fabricating the semiconductordevice according to the present embodiment are the same as those of themethod for fabricating the semiconductor device described above withreference to FIGS. 13A to 21, and their explanation will not berepeated.

Thus, the semiconductor device according to the present embodiment isfabricated (see FIG. 37).

(Modification 1)

Next, the semiconductor device according to one modification(Modification 1) of the present embodiment will be explained withreference to FIG. 38. FIG. 38 is a sectional view of the semiconductordevice according to the present modification.

The semiconductor device according to the present modification ischaracterized mainly in that a barrier film 182 is further formedbetween a first metal interconnection layer 64 and a second metalinterconnection layer 78, and a barrier film 194 is further formedbetween the second metal interconnection layer 78 and a third metalinterconnection layer 92.

As illustrated in FIG. 38, the barrier film 182 formed of ahydrogen/water diffusion preventing film 172, an intermediate layer 174,a hydrogen/water diffusion preventing film 176, an intermediate layer178 and a hydrogen/water diffusion preventing film 180 laid one onanother is formed on the planarized inter-layer insulation film 70. Thehydrogen/water diffusion preventing films 172, 176, 189 are, e.g., 20-30nm-thickness aluminum oxide films. The intermediate layers 174, 178 are,e.g., 20-30 nm-thickness silicon oxide films. Since the barrier layer182 is formed on the inter-layer insulation film 70 having the surfaceplanarized, the barrier layer 182 is flat.

The hydrogen/water diffusion preventing films 172, 176, 180 are, e.g.,aluminum oxide here but are not essentially formed of aluminum oxidefilm. The hydrogen/water diffusion preventing films 172, 176, 180 maybe, e.g., other metal oxides. For example, the hydrogen/water diffusionpreventing films 172, 176, 180 may be titanium oxide film or others.

The intermediate layers 174, 178 are, e.g., silicon oxide films but arenot essentially silicon oxide films. For examples, the intermediatelayers 174, 178 may be, e.g., silicon nitride oxide film or siliconnitride film. As described above, silicon nitride oxide film and siliconnitride film can function as the stress mitigating film and the waterdiffusion preventing film.

An insulation film 110 is formed on the barrier film 182. The insulationfilm 110 is, e.g., a 100 nm-thickness silicon oxide film.

A second metal interconnection layer 78 is formed on the insulation film110.

The barrier film 194 of a hydrogen/water diffusion preventing film 184,an intermediate layer 186, a hydrogen/water diffusion preventing film188, an intermediate layer 180 and a hydrogen/water diffusion preventingfilm 192 laid one on another is formed on the planarized inter-layerinsulation film 84. The hydrogen/water diffusion preventing films 184,188, 192 function to prevent the diffusion of the hydrogen and thewater. The hydrogen/water diffusion preventing films 184, 188, 192 are,e.g., 20-30 nm-thickness aluminum oxide films. The intermediate layers186, 190 are, e.g., 20-30 nm-thickness silicon oxide films. Since thebarrier film 194 is formed on the inter-layer insulation film 84 havingthe surface planarized, the barrier film 194 is flat.

The hydrogen/water diffusion preventing films 184, 188, 192 are aluminumoxide films here but are not essentially aluminum oxide films. Thehydrogen/water diffusion preventing films 184, 188, 192 may be, e.g.,other metal oxides. For example, the hydrogen/water diffusion preventingfilms 184, 188, 192 may be titanium oxide film, etc.

The intermediate layers 186, 190 are silicon oxide films here but arenot essentially silicon oxide films. The intermediate layers 186, 190may be, e.g., silicon nitride oxide film and silicon nitride film. Asdescribed above, silicon nitride oxide film and silicon nitride film canfunction as the stress mitigating film and the water diffusionpreventing film.

An insulation film 114 is formed on the barrier film 194. The insulationfilm 114 is, e.g., a 100 nm-thickness silicon oxide film.

A third metal interconnection layer 92 is formed on the insulation film114.

Thus, the semiconductor device according to the present modification isconstituted.

According to the present modification, the barrier film 170 is formedbetween the capacitors 44 and the first metal interconnection layer 64,and further the barrier films 182, 194 are formed respectively betweenthe first metal interconnection layer 64 and the second metalinterconnection layer 78 and between the second metal interconnectionlayer 78 and the third metal interconnection layer 92, whereby thedecrease of the switching charge quantity Q_(SW) of the capacitors 44 isprevented while the arrival of the hydrogen and the water at thecapacitors 44 can be surely prevented.

(Modification 2)

Next, the semiconductor device according to one modification of thepresent embodiment will be explained with reference to FIG. 39. FIG. 39is a sectional view of the semiconductor device according to the presentmodification.

The semiconductor device according to the present modification ischaracterized mainly by the stacked memory cell structure.

As illustrated in FIG. 39, the barrier film 170 of the hydrogen/waterdiffusion preventing film 52, the intermediate layer 162, thehydrogen/water diffusion preventing film 164, the intermediate layer 166and the hydrogen/water diffusion preventing film 168 is formed on theplanarized silicon oxide film 50.

The silicon oxide film 54 is formed on the barrier film 170.

The interconnection (the first metal interconnection layer) 64 is formedon the silicon oxide film 54.

The barrier film 182 of the hydrogen/water diffusion preventing film172, the intermediate layer 174, the hydrogen/water diffusion preventingfilm 176, the intermediate layer 178 and the hydrogen/water diffusionpreventing film 180 laid one on another is formed on the planarizedinter-layer insulation film 70.

The silicon oxide film 110 is formed on the barrier film 182.

The interconnection (the second metal interconnection layer) 78 isformed on the silicon oxide film 110.

The barrier film 194 of the hydrogen/water diffusion preventing film184, the intermediate layer 186, the hydrogen/water diffusion preventingfilm 188, the intermediate layer 190 and the hydrogen/water diffusionpreventing film 192 laid one on another is formed on the planarizedinter-layer insulation film 84.

The silicon oxide film 114 is formed on the barrier film 194.

The interconnection (the third interconnection layer) not illustrated isformed on the silicon oxide film 114.

As in the present modification, the memory cell structure may be of thestacked typed.

Modified Embodiments

The present invention is not limited to the above-described embodimentsand can cover other various modifications.

For example, in the above-described embodiments, the ferro-electric filmforming the dielectric film 40 is PZT film. However, the ferro-electricfilm forming the dielectric film 40 is not essentially PZT film and canbe any other ferro-electric film. For example, the ferro-electric filmforming the dielectric film 40 can be Pb_(1-X)La_(X)Zr_(1-Y)Ti_(Y)O₃film (PLZT film), SrBi₂(Ta_(X)Nb_(1-X))₂O₉ film, Bi₄Ti₂O₁₂ film orothers.

In the above-described embodiments, the dielectric film 40 is, e.g.,ferro-electric film but is not essentially ferro-electric film. Forexample, when DRAM, etc. are formed, the dielectric film 40 can be ahigh-dielectric constant film. The high-dielectric constant film formingthe dielectric film 40 can be, e.g., (BaSr)TiO₃ film (BST film), SrTiO₃film (STO film), Ta₂O₅ film or others. The high-dielectric constant filmis a dielectric film whose specific dielectric constant is higher thanthat of silicon dioxide.

In the above-described embodiments, the upper electrodes 42 are formedof the layer film of an IrO_(X) film, an IrO_(Y) film and a Pt film butare not formed essentially of these materials. For example, the upperelectrodes 42 may be formed of SrRuO film (SRO film).

In the first embodiment, the hydrogen diffusion preventing film isaluminum oxide film but is not essentially aluminum oxide film. A filmhaving the function of preventing the diffusion of hydrogen can besuitably used as the hydrogen diffusion preventing film. For example, afilm of a metal oxide can be suitably used as the hydrogen diffusionpreventing film. The hydrogen diffusion preventing film of a metal oxidecan be, e.g., tantalum oxide, titanium oxide, or others. The hydrogendiffusion preventing film is not essentially a metal oxide. For example,silicon nitride film (Si₃N₄ film), silicon nitride oxide film (SiONfilm) or others can be used as the hydrogen diffusion preventing film.Films of metal oxide are so dense that even when they are formedrelatively thin, they can prevent the diffusion of hydrogen withoutfailure. From the viewpoint of the micronization, it is advantageous touse a metal oxide as the hydrogen diffusion preventing film.

In the second and the third embodiments, the hydrogen/water diffusionpreventing films are aluminum oxide films but are not essentiallyaluminum oxide films. Films having the function of preventing thediffusion of hydrogen and water can be used as the hydrogen/waterdiffusion preventing films. As a film having the function of preventingthe diffusion of hydrogen and water, a film of a metal oxide, forexample, can be suitably used. The hydrogen/water diffusion preventingfilm of a metal oxide can be, e.g., titanium oxide, tantalum oxide orothers. The hydrogen/water diffusion preventing film is not essentiallya metal oxide and can be a film of any other material which can preventthe diffusion of hydrogen and water. However, films of metal oxide areso dense that even when they are formed relatively thin, they canprevent the diffusion of hydrogen and water without failure. From theviewpoint of the micronization, it is advantageous to use a metal oxideas the hydrogen diffusion preventing film.

1. A semiconductor device comprising: a capacitor formed over asemiconductor substrate and including a lower electrode, a dielectricfilm formed over the lower electrode and an upper electrode formed overthe dielectric film; an insulation film formed over the semiconductorsubstrate and the capacitor, a surface of the insulation film beingplanarized; a flat barrier film formed over the insulation film, forpreventing the diffusion of hydrogen and water, the barrier filmincluding a first film for preventing the diffusion of hydrogen andwater and a second film for mitigating a stress due to the first film.2. A semiconductor device according to claim 1, wherein the barrier filmincludes a plurality of the first films, and the second film is formedbetween said plurality of the first films.
 3. A semiconductor deviceaccording to claim 1, wherein the barrier film includes a plurality ofthe second films, and the plural second films are formed respectivelyover and under the first films.
 4. A semiconductor device according toclaim 1, the first film is formed of a metal oxide.
 5. A semiconductordevice according to claim 4, wherein the metal oxide is aluminum oxideor titanium oxide.
 6. A semiconductor device according to claim 1,wherein the second film is a silicon nitride film or silicon nitrideoxide film.
 7. A semiconductor device according to claim 1, whichfurther comprises an interconnection formed above the capacitor andelectrically connected to the lower electrode or the upper electrode,and in which the barrier film is formed between the capacitor and theinterconnection.
 8. A semiconductor device according to claim 1, whichcomprises: a first interconnection formed above the capacitor andelectrically connected to the lower electrode or the upper electrode;and a second interconnection formed above the first a secondinterconnection formed above the first interconnection, and in which thebarrier film is formed between the first interconnection and the secondinterconnection.
 9. A semiconductor device according to claim 1, whichfurther comprises: a first interconnection formed above the capacitorand electrically connected to the lower electrode and the upperelectrode; a second interconnection formed above the firstinterconnection; and a third interconnection formed above the secondinterconnection, and in which the barrier film is formed between thesecond interconnection and the third interconnection.
 10. Asemiconductor device according to claim 1, further comprising: a firstinterconnection formed above the capacitor and electrically connected tothe lower electrode or the upper electrode; a second interconnectionformed above the first interconnection; and a third interconnectionformed above the second interconnection, and in which the barrier filmsare formed respectively between the capacitor and the firstinterconnection, between the first interconnection and the secondinterconnection, and between the second interconnection and the thirdinterconnection.
 11. A method for fabricating a semiconductor devicecomprising: a step of forming on a semiconductor substrate a capacitorincluding a lower electrode, dielectric film formed on the lowerelectrode and an upper electrode formed on the dielectric film; a stepof forming an insulation film on the semiconductor substrate and thecapacitor; the step of polishing a surface of the insulation film toplanarize the surface of the insulation film; and a step of forming overthe insulation film a barrier film for preventing the diffusion ofhydrogen and water, the step of forming a barrier film including a stepof forming a first film for preventing the diffusion of hydrogen andwater and a step of forming a second film for mitigating a stress due tothe first film.
 12. A method for fabricating a semiconductor deviceaccording to claim 11, further comprising, after the step of planarizedthe surface of the insulation film and before the step of forming thebarrier film, the step of performing thermal processing in a nitrogenatmosphere to nitride the surface of the insulation film.
 13. Asemiconductor device comprising: a capacitor formed on a semiconductorsubstrate and including a lower electrode, a dielectric film formed overthe lower electrode and an upper electrode formed over the dielectricfilm; an insulation film formed over the semiconductor substrate and thecapacitor, a surface of the insulation film being planarized; and a flatbarrier film formed over the insulation film, for preventing thediffusion of hydrogen and water, the barrier film being formed of aplurality of first films for preventing the diffusion of hydrogen andwater, which are laid one on another with a second film of a dielectricsubstance.
 14. A semiconductor device according to claim 13, wherein thefirst film is formed of a metal oxide.
 15. A semiconductor deviceaccording to claim 14, wherein the metal oxide is aluminum oxide ortitanium oxide.
 16. A semiconductor device according to claim 13,wherein the second film is a silicon oxide film, a silicon nitride filmor a silicon nitride oxide film. film or a silicon nitride oxide film.17. A method for fabricating a semiconductor device comprising: a stepof forming over a semiconductor substrate a capacitor including a lowerelectrode, a dielectric film formed over the lower electrode and anupper electrode formed over the dielectric film; a step of forming aninsulation film over the semiconductor substrate and the capacitor; thestep of polishing a surface of the insulation film to planarize thesurface of the insulation film; and a step of forming over theinsulation film a flat barrier film for preventing the diffusion ofhydrogen and water, in the step of forming a barrier film, a pluralityof first films for preventing the diffusion of hydrogen and water arelaid one on another with a second film of a dielectric substance formedthere between.
 18. A method for fabricating a semiconductor deviceaccording to claim 17, further comprising, after the step of planarizedthe surface of the insulation film and before the step of forming abarrier film, a step of performing thermal processing in a nitrogenatmosphere to nitride the surface of the insulation film.